PWM output polarity inverted.

Inverted to correspond with power electronic board LP_MPW1 where
PWM input signals are inverted too.

diff --git a/msp_motion.vhd b/msp_motion.vhd
index b131d18948e3929c5df9ea173c0b8f34cfc69af4..a9769487189263d0f25fa4623bde65272e8d8dab 100644 (file)
--- a/msp_motion.vhd
+++ b/msp_motion.vhd
@@ -417,12 +417,13 @@ begin
       pwm     => PWM3_OUT);
 
   -- PWM signals mapped to FPGA outputs, EN forced to '1'
-  PWM0    <= PWM1_OUT;
+  PWM0    <= not PWM1_OUT;
   PWM0_EN <= '1';
-  PWM1    <= PWM2_OUT;
+  PWM1    <= not PWM2_OUT;
   PWM1_EN <= '1';
-  PWM2    <= PWM3_OUT;
+  PWM2    <= not PWM3_OUT;
   PWM2_EN <= '1';
+
   -- PWM is signalized on LEDs
   LED0    <= PWM1_OUT;
   LED1    <= PWM2_OUT;