2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
6 --------------------------------------------------------------------------------
10 AXIS_CNT : integer := 1;
11 AXIS_CNT_W : integer := 1);
17 MCC_AXIS_O : out std_logic_vector (AXIS_CNT_W-1 downto 0);
18 MCC_DONE_O : out std_logic;
19 MCC_EN_I : in std_logic;
20 MCC_EXEC_I : in std_logic;
21 MCC_ERR_O : out std_logic;
22 -- MCC master interface
23 MCC_ACK_I : in std_logic;
24 MCC_STB_O : out std_logic);
27 --------------------------------------------------------------------------------
29 architecture behavioral of mcc_exec is
31 type state_t is (ready, do);
33 signal state : state_t := ready;
35 signal mcc_axis : std_logic_vector (MCC_AXIS_O'range);
36 signal mcc_done : std_logic := '0';
37 signal mcc_stb : std_logic := '0';
39 --------------------------------------------------------------------------------
43 assert (AXIS_CNT <= 2**AXIS_CNT_W)
44 report "Insufficient count of bits in MCC_AXIS_O to express axis number."
48 MCC_AXIS_O <= mcc_axis;
49 MCC_DONE_O <= mcc_done;
50 MCC_ERR_O <= '1' when (MCC_EXEC_I = '1' and state = do) else '0';
55 FSM : process (CLK_I) is
57 if rising_edge(CLK_I) then
70 if MCC_EXEC_I = '1' and MCC_EN_I = '1' then
73 mcc_axis <= conv_std_logic_vector(0,AXIS_CNT_W);
79 if MCC_ACK_I = '1' then
82 if mcc_axis = (AXIS_CNT-1) then
86 mcc_axis <= mcc_axis + 1;
95 end architecture behavioral;