]> rtime.felk.cvut.cz Git - fpga/pwm.git/summary
 
descriptionThe control block for three phases BLDC motor PWM output with profile based commutation logic
ownerburiavl2
last changeWed, 15 Jun 2011 06:10:06 +0000 (08:10 +0200)
shortlog
2011-06-15 Vladimir BurianWave_table initialization data format modified. master
2011-05-27 Vladimir BurianMCC testbench tests all MCC entities/modules.
2011-05-27 Vladimir BurianMCC_EXEC entity support for multiple axes control.
2011-05-27 Vladimir BurianCorrected generic parameters in MCC entity.
2011-05-27 Vladimir BurianPWM3 wrapper for 3 PWMs entities.
2011-05-26 Vladimir BurianWave_table impure function.
2011-05-26 Vladimir BurianPWM selection signal added.
2011-05-26 Vladimir BurianOverflow event signal of counter corrected.
2011-05-18 Vladimir BurianModified sine wave in MCC.
2011-05-18 Vladimir BurianAdded pwm_min_dump - modified sin wave
2011-05-18 Vladimir BurianAdded pwm_min component.
2011-05-18 Vladimir BurianUnused signal removed and minor change.
2011-05-18 Vladimir BurianResets changed from asynchronous to synchronous.
2011-05-18 Vladimir BurianEarly initialization of all relevant signals.
2011-04-16 Vladimir Burianmcc.vhd port definition corrected
2011-04-16 Vladimir BurianGeneral counter extended by clk_en input
...
heads
12 years ago bastien-barriere
12 years ago master
12 years ago central_alu