return 0;
}
+int cmd_do_reg_type(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ int val;
+ pxmc_state_t *mcs;
+
+ if((mcs=cmd_opchar_getreg(cmd_io,des,param))==NULL) return -CMDERR_BADREG;
+
+ if(*param[2]=='?') {
+ return cmd_opchar_replong(cmd_io, param, pxmc_get_reg_type(mcs), 0, 0);
+ }
+
+ if(*param[2]!=':') return -CMDERR_OPCHAR;
+
+ if(mcs->pxms_flg&PXMS_BSY_m) return -CMDERR_BSYREG;
+
+ val=atol(param[3]);
+ val=pxmc_set_reg_type(mcs, val);
+
+ if(val<0)
+ return val;
+
+ return 0;
+}
+
/**
* cmd_do_axis_mode - checks the command format and busy flag validity, calls pxmc_axis_mode
*
cmd_des_t const cmd_des_pthalign={0, CDESM_OPCHR|CDESM_RW,"PTHALIGN?","run alignement of phase according to HAL",
cmd_do_pthalign,
{0,0}};
+cmd_des_t const cmd_des_reg_type={0, CDESM_OPCHR|CDESM_RW,
+ "REGTYPE?","select controller structure and type",cmd_do_reg_type,
+ {}};
cmd_des_t const cmd_des_axis_mode={0, CDESM_OPCHR|CDESM_WR,
"REGMODE?","axis working mode",cmd_do_axis_mode,
{}};
&cmd_des_status_bsybits,
&cmd_des_stamp,
&cmd_des_pthalign,
+ &cmd_des_reg_type,
&cmd_des_axis_mode,
&cmd_des_axes_outmap,
&cmd_des_errstop,
}
+pxmc_call_t *const pxmc_reg_type_table[] = {
+ pxmc_pid_con,
+ pxmc_pid_con,
+ pxmc_pidnl_con
+};
+
+
+int pxmc_get_reg_type(pxmc_state_t *mcs)
+{
+ int reg_type;
+ int max_type = sizeof(pxmc_reg_type_table) / sizeof(*pxmc_reg_type_table);
+
+ for (reg_type = 1; reg_type < max_type; reg_type++)
+ if (mcs->pxms_do_con == pxmc_reg_type_table[reg_type])
+ return reg_type;
+ return 0;
+}
+
+int pxmc_set_reg_type(pxmc_state_t *mcs, int reg_type)
+{
+ int max_type = sizeof(pxmc_reg_type_table) / sizeof(*pxmc_reg_type_table);
+
+ if ((reg_type < 0) || (reg_type >= max_type))
+ return -1;
+ if (mcs->pxms_flg & PXMS_ENR_m)
+ return -1;
+
+ mcs->pxms_do_con = pxmc_reg_type_table[reg_type];
+ return 0;
+}
+
int pxmc_clear_power_stop(void)
{
return 0;