From: Pavel Pisa <ppisa@pikron.com>
Date: Sat, 13 Jun 2015 17:28:22 +0000 (+0200)
Subject: RoCoN: include support to select alternative controller type.
X-Git-Url: http://rtime.felk.cvut.cz/gitweb/fpga/lx-cpu1/lx-rocon.git/commitdiff_plain/e8a2974fb0a44cab57ec8dce398b5030d4e81981

RoCoN: include support to select alternative controller type.

The actual choice is between standard PID and PID
with non-linear/accelerated I component decrease.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
---

diff --git a/submodule/pxmc b/submodule/pxmc
index 002bf91..7e85415 160000
--- a/submodule/pxmc
+++ b/submodule/pxmc
@@ -1 +1 @@
-Subproject commit 002bf91c0907845b45bb7d5a8221edd57ce722da
+Subproject commit 7e85415ba55fe746ddc1fc230244abc4908ac389
diff --git a/sw/app/rocon/appl_cmds.c b/sw/app/rocon/appl_cmds.c
index 7923cb8..7c02924 100644
--- a/sw/app/rocon/appl_cmds.c
+++ b/sw/app/rocon/appl_cmds.c
@@ -96,6 +96,30 @@ int cmd_do_pthalign(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
     return 0;
 }
 
+int cmd_do_reg_type(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+  int val;
+  pxmc_state_t *mcs;
+
+  if((mcs=cmd_opchar_getreg(cmd_io,des,param))==NULL) return -CMDERR_BADREG;
+
+  if(*param[2]=='?') {
+    return cmd_opchar_replong(cmd_io, param, pxmc_get_reg_type(mcs), 0, 0);
+  }
+
+  if(*param[2]!=':') return -CMDERR_OPCHAR;
+
+  if(mcs->pxms_flg&PXMS_BSY_m) return -CMDERR_BSYREG;
+
+  val=atol(param[3]);
+  val=pxmc_set_reg_type(mcs, val);
+
+  if(val<0)
+    return val;
+
+  return 0;
+}
+
 /**
  * cmd_do_axis_mode - checks the command format and busy flag validity, calls pxmc_axis_mode
  *
@@ -290,6 +314,9 @@ cmd_des_t const cmd_des_stamp={0, CDESM_OPCHR,
 cmd_des_t const cmd_des_pthalign={0, CDESM_OPCHR|CDESM_RW,"PTHALIGN?","run alignement of phase according to HAL",
 			cmd_do_pthalign,
 			{0,0}};
+cmd_des_t const cmd_des_reg_type={0, CDESM_OPCHR|CDESM_RW,
+			"REGTYPE?","select controller structure and type",cmd_do_reg_type,
+			{}};
 cmd_des_t const cmd_des_axis_mode={0, CDESM_OPCHR|CDESM_WR,
 			"REGMODE?","axis working mode",cmd_do_axis_mode,
 			{}};
@@ -324,6 +351,7 @@ cmd_des_t const *const cmd_appl_specific[]={
   &cmd_des_status_bsybits,
   &cmd_des_stamp,
   &cmd_des_pthalign,
+  &cmd_des_reg_type,
   &cmd_des_axis_mode,
   &cmd_des_axes_outmap,
   &cmd_des_errstop,
diff --git a/sw/app/rocon/appl_pxmc.c b/sw/app/rocon/appl_pxmc.c
index 6d44c8a..5d19fb7 100644
--- a/sw/app/rocon/appl_pxmc.c
+++ b/sw/app/rocon/appl_pxmc.c
@@ -2493,6 +2493,37 @@ void pxmc_sfi_isr(void)
 
 }
 
+pxmc_call_t *const pxmc_reg_type_table[] = {
+  pxmc_pid_con,
+  pxmc_pid_con,
+  pxmc_pidnl_con
+};
+
+
+int pxmc_get_reg_type(pxmc_state_t *mcs)
+{
+  int reg_type;
+  int max_type = sizeof(pxmc_reg_type_table) / sizeof(*pxmc_reg_type_table);
+
+  for (reg_type = 1; reg_type < max_type; reg_type++)
+    if (mcs->pxms_do_con == pxmc_reg_type_table[reg_type])
+      return reg_type;
+  return 0;
+}
+
+int pxmc_set_reg_type(pxmc_state_t *mcs, int reg_type)
+{
+  int max_type = sizeof(pxmc_reg_type_table) / sizeof(*pxmc_reg_type_table);
+
+  if ((reg_type < 0) || (reg_type >= max_type))
+    return -1;
+  if (mcs->pxms_flg & PXMS_ENR_m)
+    return -1;
+
+  mcs->pxms_do_con = pxmc_reg_type_table[reg_type];
+  return 0;
+}
+
 int pxmc_clear_power_stop(void)
 {
   return 0;
diff --git a/sw/app/rocon/appl_pxmc.h b/sw/app/rocon/appl_pxmc.h
index 2b68cbe..1077cfa 100644
--- a/sw/app/rocon/appl_pxmc.h
+++ b/sw/app/rocon/appl_pxmc.h
@@ -46,4 +46,8 @@ int pxmc_rocon_pwm_direct_wr(unsigned chan, unsigned pwm, int en);
 
 int pxmc_rocon_wait_rx_done(void);
 
+int pxmc_get_reg_type(pxmc_state_t *mcs);
+
+int pxmc_set_reg_type(pxmc_state_t *mcs, int reg_type);
+
 #endif /*_APPL_PXMC_H_*/