vdma: xilinx: Fix vdmatest driver crashing when unloading as a module
This patch fixes the issue vdmatest
driver crashing when unloading as a module.
get_task_struct and put_task_struct manage a thread's reference count.
After we done get_task_struct, it will always be safe to access that memory,
until we release it.get_task_struct and put_task_struct manage a thread's reference count.
If we call put_task_struct and we are the last one with a reference count, it does a bunch of
cleanup.
mtd: spi-nor: Updated write register for spansion flashes
Since the spansion flash parts require status register and configuration register
to be written at the same time,changed write_sr_modify_protection to use write_sr_cr
instead of write_sr.
Changed spansion_quad_enable to retain the old status register values in order to
avoid unsetting of the previously enabled flash protection bits.
Deprecate the gdma and adma naming scheme and use zynqmp-dma instead
of those. Axi buswidth value differs between the gdma and adma.
So, Added this as DT property.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 25 May 2015 13:14:09 +0000 (15:14 +0200)]
ARM: zynq: Use MACB driver instead of emacps
Switch to macb driver which should be done long time ago.
There are two unsupported features which will be ported to mainline macb
driver in future. GMII2RGMII and support for multiple PHYs on the same
MDIO bus.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Thomas Betker [Tue, 19 May 2015 05:25:53 +0000 (07:25 +0200)]
spi: zynq-qspi: Use writesl/readsl
In zynq_qspi_fill_tx_fifo() and zynq_qspi_drain_rx_fifo(), use
writesl() and readsl(), resp. These helper functions are optimized for
this purpose, and they avoid unaligned memory access.
Warning: We don't use register access wrappers for writing/reading full
FIFO words, so if zynq_qspi_write() and zynq_qspi_read() are changed
some day, remember to check zynq_qspi_fill_tx_fifo() and
zynq_qspi_drain_rx_fifo() separately.
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Tue, 19 May 2015 05:25:51 +0000 (07:25 +0200)]
spi: zynq-qspi: Add drain_rx_fifo function
Factor out zynq_qspi_drain_rx_fifo() from zynq_qspi_irq(), for
readability.
Rewrite the loop to make clear that we read min(len, 4*rxcount) bytes
from the RxFIFO, which is what we want. The old code does the same,
provided that len%4==0 || txlen==0; this condition is satisfied due to
the FIFO fill/drain pattern. [When the condition is not satisfied, the
old code reads more than the desired number of bytes; all this is not
readily apparent, though.]
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Sullivan [Wed, 13 May 2015 22:01:36 +0000 (17:01 -0500)]
net: macb: Add better comment for RXUBR handling
Describe the handler for RXUBR better with a new comment.
Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Reviewied-by: Josh Cartwright <joshc@ni.com> Reviewied-by: Ben Shelton <ben.shelton@ni.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Nathan Sullivan [Tue, 5 May 2015 20:00:25 +0000 (15:00 -0500)]
net: macb: Handle the RXUBR interrupt on all devices
The same hardware issue the at91 must work around applies to at least the
Zynq ethernet, and possibly more devices. The driver also needs to handle
the RXUBR interrupt since it turns it on with MACB_RX_INT_FLAGS anyway.
Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Thomas Betker [Tue, 19 May 2015 05:25:49 +0000 (07:25 +0200)]
spi: zynq-qspi: Use 0xff to pad Tx data
When padding Tx data, the pad byte is currently undefined; set it
to 0xff in zynq_qspi_copy_write_data().
Tx data padding is used to align the data sent with a Program
command to a multiple of two bytes. Sending zero bits may overwrite a
flash byte which is not intended to be written; send 0xff to keep the
extra flash byte unchanged.
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Reviewed-by: Harini Katakam <harinik@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Tue, 19 May 2015 05:25:47 +0000 (07:25 +0200)]
spi: zynq-qspi: Revise copy_write_data
Combine zynq_qspi_copy_write_data() with writing the TxFIFO register to
simplify the code; rename the function to zynq_qspi_write_tx_fifo().
The new function copies data from xqspi->txbuf and writes it to the
TXD0/TXD1/TXD2/TXD3 register. It also handles the pad byte in the
dual-parallel case, integrating zynq_qspi_tx_dual_parallel().
This is just a cleanup; the control flow is not affected
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Harini Katakam <harinik@xilinx.com>
gpu: drm: xylon: Convert src coordinates to 16.16 fixed point
Convert src coordinates to 16.16 fixed point format.
It fixes the issue where src coordindates are passed as 0
when update_plane is called from crtc helper function.
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Christian Kohn <christian.kohn@xilinx.com>
Davor Joja [Tue, 19 May 2015 11:45:44 +0000 (17:15 +0530)]
gpu: drm: xylon: Fixed properties dependency on background layer
Fixed properties creation and usage depending on logiCVC IP background layer.
If background layer is present, and plane is last, properties will not be
created. If background layer is not present, driver will crash due to NULL
pointer access on "color_transparency" property.
Signed-off-by: Davor Joja <davorjoja@logicbricks.com> Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Christian Kohn <christian.kohn@xilinx.com>
Hyun Kwon [Sat, 16 May 2015 00:14:37 +0000 (17:14 -0700)]
drm: xilinx: dp: Don't check PHY status in encoder_init()
The DP PHY isn't ready when the sink device isn't connected.
The encoder should be initialized fine without any sink device
connected, so remove the PHY status check in
xilinx_drm_dp_encoder_init().
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Hyun Kwon [Sat, 16 May 2015 00:14:34 +0000 (17:14 -0700)]
drm: xilinx: dp: Soft reset when DPMS gets on
DP Soft reset clears the video pipe, and needs to be called when some
video related configuration such as clock source or resolution is
changed. Programming the soft reset when DPMS gets on ensures that
the DP core gets synchronized with the latest video configuration.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Erico Nunes [Fri, 2 Jan 2015 02:40:33 +0000 (00:40 -0200)]
microblaze: Add missing PVR version codes
PVR version code was missing in the cpu_ver_lookup table for the following
versions: 8.50.b 8.50.c 9.2 9.3
This caused /proc/cpuinfo to display "CPU-Ver: Unknown" for these versions.
This was detected and the patch tested with MicroBlaze version 8.50.c.
The other codes were taken from the Xilinx MicroBlaze Processor Reference
Guides UG081 (v14.7) and UG984 (v2014.1).
Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Mon, 11 May 2015 19:21:18 +0000 (21:21 +0200)]
ARM: zynq: Turn on PL310 L2 cache prefetching
This patch was originally authored by John Linn on 22-Sep-2011 for
linux-xlnx.git, but got lost somehow. It turns on L2 cache prefetching
when XILINX_PREFETCH (formerly XILINX_L2_PREFETCH) is enabled.
The original patch also set the Auxiliary Control Register bit "Early
BRESP enable" (in addition to "Instruction prefetch enable" and "Data
prefetch enable"), but for Cortex-A9, this bit is now set automatically
by l2c310_enable().
Suggested-by: John Linn <john.linn@xilinx.com> Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Mon, 11 May 2015 19:21:17 +0000 (21:21 +0200)]
ARM: zynq: Set bit 22 in PL310 AuxCtrl register
This patch was originally authored by Punnaiah Choudary Kalluri
on 06-Mar-2014 for linux-xlnx.git, but got lost somehow. It is based
on the commit a8e41cd672f8 ("ARM: 6395/1: VExpress: Set bit 22 in the
PL310 (cache controller) AuxCtlr register"), on 17-Sep-2010:
Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.
For Zynq, this fix avoids memory inconsistencies between Gigabit
Ethernet controller (GEM) and CPU when DMA_CMA is disabled.
Suggested-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace netdev_alloc_skb_ip_align with netdev_alloc_skb.
This is needed to support all configurations of AXIDMA.
If DRE in AXIDMA is not selected, the alignment of IP will cause failures.
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Using IDR_SRR in RXFIFO_ID to test for the presence of data is only
valid for standard frames. For extended frames the bit is always 1 and
IDR_RTR should be used instead. This patch switches the check to use
CAN_RTR_FLAG which is correctly set when reading the ID.
The patch also changes the DW1/DW2 to be read unconditionally, since
this is necessary to remove the frame from the RXFIFO.
Michal Simek [Thu, 23 Apr 2015 12:50:13 +0000 (14:50 +0200)]
nand: arasan_nfs: Add missing of.h
For !CONFIG_OF_MTD case of.h is missing.
Kbuild system reports error:
drivers/mtd/nand/arasan_nfc.c: In function 'anfc_probe':
drivers/mtd/nand/arasan_nfc.c:794:2: error: implicit declaration of
function 'of_property_read_bool'
[-Werror=implicit-function-declaration]
nfc->dma = of_property_read_bool(pdev->dev.of_node,
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 23 Apr 2015 12:26:42 +0000 (14:26 +0200)]
drm: xylon: Fix runtime PM support in the driver
Error reported by Kbuild:
In file included from include/linux/device.h:25:0,
from include/linux/dma-mapping.h:5,
from include/drm/drmP.h:37,
from drivers/gpu/drm/xylon/xylon_drv.c:20:
>> drivers/gpu/drm/xylon/xylon_drv.c:305:21: error:
>> 'xylon_drm_pm_suspend' undeclared here (not in a function)
SET_RUNTIME_PM_OPS(xylon_drm_pm_suspend, xylon_drm_pm_resume, NULL)
include/linux/pm.h:347:21: note: in definition of macro
'SET_RUNTIME_PM_OPS'
.runtime_suspend = suspend_fn, \
>> drivers/gpu/drm/xylon/xylon_drv.c:305:43: error:
>> 'xylon_drm_pm_resume' undeclared here (not in a function)
SET_RUNTIME_PM_OPS(xylon_drm_pm_suspend, xylon_drm_pm_resume, NULL)
include/linux/pm.h:348:20: note: in definition of macro
'SET_RUNTIME_PM_OPS'
.runtime_resume = resume_fn, \
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 23 Apr 2015 12:24:52 +0000 (14:24 +0200)]
staging: pmods: Fix missing SPI dependency
Compilation error reported by Kbuild:
drivers/built-in.o: In function `screen_buf_to_display':
pmodoled-gpio.c:(.text+0x2428a2): undefined reference to `spi_sync'
pmodoled-gpio.c:(.text+0x2428fe): undefined reference to `spi_sync'
drivers/built-in.o: In function `gpio_pmodoled_spi_remove':
pmodoled-gpio.c:(.text+0x2429cd): undefined reference to `spi_sync'
drivers/built-in.o: In function `gpio_pmodoled_spi_probe':
pmodoled-gpio.c:(.text+0x242c34): undefined reference to `spi_setup'
drivers/built-in.o: In function `gpio_pmodoled_of_probe':
>> pmodoled-gpio.c:(.text+0x243145): undefined reference to
>> `spi_busnum_to_master'
>> pmodoled-gpio.c:(.text+0x24317d): undefined reference to
>> `spi_alloc_device'
>> pmodoled-gpio.c:(.text+0x2431fe): undefined reference to
>> `spi_add_device'
>> pmodoled-gpio.c:(.text+0x243307): undefined reference to
>> `spi_register_driver'
drivers/built-in.o: In function `gpio_pmodoled_disp_init':
pmodoled-gpio.c:(.text.unlikely+0x26a5): undefined reference to
`spi_sync'
pmodoled-gpio.c:(.text.unlikely+0x2733): undefined reference to
`spi_sync'
pmodoled-gpio.c:(.text.unlikely+0x27ae): undefined reference to
`spi_sync'
drivers/built-in.o:(.data+0x4851c): undefined reference to
`spi_bus_type'
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 23 Apr 2015 12:14:16 +0000 (14:14 +0200)]
xen: Fix compilation error reported by Kbuilt
HVC xen earlycon support is temporary solution till the proper way is
found.
Compilation error:
drivers/tty/hvc/hvc_xen.c:625:13: error: redefinition of
'xenboot_write_console'
static void xenboot_write_console(struct console *console, const
char *string,
drivers/tty/hvc/hvc_xen.c:590:13: note: previous definition of
'xenboot_write_console' was here
static void xenboot_write_console(struct console *console, const
char *string,
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove the internal dependency on DPMS mode for power management by
using a by a powered state boolean instead, and use the new power off
handler at probe time. This ensure that the regmap cache is properly
marked as dirty when the device is probed, and the registers properly
synced during the first power up.
As a side effect this removes the initialization of current_edid_segment
at probe time, as the field will be initialized when the device is
powered on, at the latest right before reading EDID data.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Christian Kohn <christian.kohn@xilinx.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The EDID read code waits for the read completion interrupt to occur
using wait_event_interruptible(). The condition passed to the macro
reads I2C registers. This results in sleeping with the task state set
to TASK_INTERRUPTIBLE, triggering a WARN_ON() introduced in commit 8eb23b9f35aae ("sched: Debug nested sleeps").
Fix this by reworking the EDID read code. Instead of checking whether
the read is complete through I2C reads, handle the interrupt registers
in the interrupt handler and update a new edid_read flag accordingly. As
a side effect both the IRQ and polling code paths now process the
interrupt sources through the same code path, simplifying the code.
Cc: stable@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The DDC error interrupt bit is located in REG_INT1, not REG_INT0. Update
both the interrupt wait code and the interrupt sources reset code
accordingly.
Cc: stable@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 17 Apr 2015 10:05:05 +0000 (12:05 +0200)]
pcie: xilinx: Fix debug message
Fix compilation warning:
drivers/pci/host/pcie-xilinx.c: In function
'xilinx_pcie_clear_err_interrupts':
drivers/pci/host/pcie-xilinx.c:154:3: warning: format '%d' expects
argument of type 'int', but argument 4 has type 'long unsigned int'
[-Wformat=]
dev_dbg(port->dev, "Requester ID %d\n",
Fix compilation warning:
drivers/remoteproc/remoteproc_core.c:588:5: warning:
"RPROC_CARVEOUT_USE_IOREMAP" is not defined [-Wundef]
#if RPROC_CARVEOUT_USE_IOREMAP
^
drivers/remoteproc/remoteproc_core.c:806:6: warning:
"RPROC_CARVEOUT_USE_IOREMAP" is not defined [-Wundef]
#if !RPROC_CARVEOUT_USE_IOREMAP
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 16 Apr 2015 13:04:24 +0000 (15:04 +0200)]
Merge tag 'v3.19' into master
- v4l2/media fixes
- Remove USB and fix dtses
- Enable ChipIdea and PHY driver in defconfig
- Fix emacps
- Fix adv7511-core function parameters
- spi-nor fixes
"mtd:spi-nor: Fixed the merge conflicts with 3.19
This patch has the following modifications:
1.Added spansion_quad_enable under spansion id and default as zero
in set_quad_enable function.
2.Using nor->jedec_id for identifing the flash_parts,since struct
flash_info
is not available at run time.
3.Added spi_nor_wait_till_ready after the write_ear in spi_nor_erase
function.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Harini Katakam <harinik@xilinx.com>" Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Tue, 10 Mar 2015 21:45:09 +0000 (22:45 +0100)]
serial: xuartps: Fix iobase use.
cdns_uart_get_port() sets port->iobase = 1 to "mark port in use", but
this "in use" condition is not checked anywhere else in the code. So
remove the line, keeping port->iobase = 0 (which also makes more sense).
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thomas Betker [Tue, 10 Mar 2015 21:45:10 +0000 (22:45 +0100)]
serial: xuartps: Fix check in console_setup().
cdns_uart_console_setup() checks port->mapbase != 0, but the port may
not be initialized yet even if this condition is met [e.g., ioremap()
may have failed]. Check port->membase != NULL instead, similar to
cdns_early_console_setup().
Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: gadget: xudc: fix return value check in xudc_probe()
In case of error, the function devm_ioremap_resource() returns
ERR_PTR() and never returns NULL. The NULL test in the return
value check should be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: macb: Fix race condition in driver when Rx frame is dropped
Under heavy Rx load, observed that the Hw is updating the USED bit
and it is not updating the received frame status to the BD control
field. This could be lack of resources for processing the BDs at high
data rates. Driver drops the frame associated with this BD but not
clearing the USED bit. So, this is causing hang condition as Hw
expects USED bit to be cleared for this BD.
Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
If a reset GPIO is specified but not available we must defer probing, as
the device could be held in reset. Use devm_gpiod_request_optional() to
handle this automatically.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Hans Verkuil [Tue, 14 Apr 2015 18:31:51 +0000 (11:31 -0700)]
adv7604: Correct G/S_EDID behaviour
In order to have v4l2-compliance tool pass the G/S_EDID some modifications
where needed in the driver.
In particular, the edid.reserved zone must be blanked.
Based on a patch from Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>,
but reworked it a bit. It should use 'data' (which depends on edid.present)
instead of edid.blocks as the check whether edid data is present.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not probe all serial drivers by of_serial.c which are using
device_type = "serial"; property. Only drivers which have valid
compatible strings listed in the driver should be probed.
When PORT_UNKNOWN probe will fail anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 13 Apr 2015 13:24:20 +0000 (15:24 +0200)]
serial: xilinx: Use platform_get_irq to get irq description structure
For systems with CONFIG_SERIAL_OF_PLATFORM=y and device_type =
"serial"; property in DT of_serial.c driver maps and unmaps IRQ (because
driver probe fails). Then a driver is called but irq mapping is not
created that's why driver is failing again in again on request_irq().
Based on this use platform_get_irq() instead of platform_get_resource()
which is doing irq_desc allocation and driver itself can request IRQ.
Fix both xilinx serial drivers in the tree.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>