David Lechner [Tue, 12 Dec 2017 21:59:16 +0000 (15:59 -0600)]
Bluetooth: hci_ll: add support for setting public address
This adds support for setting the public address on Texas Instruments
Bluetooth chips using a vendor-specific command.
This has been tested on a CC2560A chip. The TI wiki also indicates that
this command should work on TI WL17xx/WL18xx Bluetooth chips.
During review, there was some question as to the correctness of the byte
swapping since TI's documentation is not clear on this matter. This can
be tested with the btmgmt utility from bluez. The adapter must be powered
off to change the address. If the baswap() is omitted, address is reversed.
In case there is a issue in the future, here is the output of btmon during
the command `btmgmt public-addr 00:11:22:33:44:55`:
Bluetooth monitor ver 5.43
= Note: Linux version 4.15.0-rc2-08561-gcb132a1-dirty (armv5tejl) 0.707043
= Note: Bluetooth subsystem version 2.22 0.707091
= New Index: 00:17:E7:BD:1C:8E (Primary,UART,hci0) [hci0] 0.707106
@ MGMT Open: btmgmt (privileged) version 1.14 {0x0002} 0.707124
@ MGMT Open: bluetoothd (privileged) version 1.14 {0x0001} 0.707137
@ MGMT Open: btmon (privileged) version 1.14 {0x0003} 0.707540
@ MGMT Command: Set Public Address (0x0039) plen 6 {0x0002} [hci0] 11.167991
Address: 00:11:22:33:44:55 (CIMSYS Inc)
@ MGMT Event: Command Complete (0x0001) plen 7 {0x0002} [hci0] 11.175681
Set Public Address (0x0039) plen 4
Status: Success (0x00)
Missing options: 0x00000000
@ MGMT Event: Index Removed (0x0005) plen 0 {0x0003} [hci0] 11.175757
@ MGMT Event: Index Removed (0x0005) plen 0 {0x0002} [hci0] 11.175757
@ MGMT Event: Index Removed (0x0005) plen 0 {0x0001} [hci0] 11.175757
= Open Index: 00:17:E7:BD:1C:8E [hci0] 11.176807
< HCI Command: Vendor (0x3f|0x0006) plen 6 [hci0] 11.176975
00 11 22 33 44 55 .."3DU
> HCI Event: Command Complete (0x0e) plen 4 [hci0] 11.188260
Vendor (0x3f|0x0006) ncmd 1
Status: Success (0x00)
...
< HCI Command: Read Local Version Info.. (0x04|0x0001) plen 0 [hci0] 11.189859
> HCI Event: Command Complete (0x0e) plen 12 [hci0] 11.190732
Read Local Version Information (0x04|0x0001) ncmd 1
Status: Success (0x00)
HCI version: Bluetooth 2.1 (0x04) - Revision 0 (0x0000)
LMP version: Bluetooth 2.1 (0x04) - Subversion 6431 (0x191f)
Manufacturer: Texas Instruments Inc. (13)
< HCI Command: Read BD ADDR (0x04|0x0009) plen 0 [hci0] 11.191027
> HCI Event: Command Complete (0x0e) plen 10 [hci0] 11.192101
Read BD ADDR (0x04|0x0009) ncmd 1
Status: Success (0x00)
Address: 00:11:22:33:44:55 (CIMSYS Inc)
...
Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
David Lechner [Sun, 3 Dec 2017 02:43:55 +0000 (20:43 -0600)]
Bluetooth: serdev: hci_ll: Wait for CTS instead of using msleep
When a TI Bluetooth chip is reset, it takes about 100ms for the RTS line of
the chip to deassert. For my use case with a TI CC2560A chip, this delay
was not long enough and caused the local UART to never transmit at all (TI
AM1808 SoC UART2).
We can wait for the CTS signal using serdev_device_wait_for_cts() instead
of trying to guess using msleep().
Also changed the comment to be more informative while we are touching this
code.
Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
This commit must be reverted, else loading overlays
from the configfs interface will be fails with the
following errors:
OF: changeset: add_property failed @/__symbols__/...
OF: Error applying changeset (-17)
Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Thu, 8 Mar 2018 14:15:00 +0000 (06:15 -0800)]
clk: clk-fixed-factor: Use new macro CLK_OF_DECLARE_DRIVER
Fixed factor clock has two initialization at of_clk_init()
time and also during platform driver probe. So declare the
fixed factor clock with CLK_OF_DECLARE_DRIVER instead of
CLK_OF_DECLARE.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Kieran Bingham [Wed, 7 Mar 2018 21:13:29 +0000 (13:13 -0800)]
uvcvideo: Prevent new URBs being processed at stream stop
With asynchronous handling of the URBs from the USB Complete handler, we
get a continual stream of packets being received while we are attempting
to shutdown the stream.
Packets that have already been received and processed are on a
work-queue, but during stream shutdown the URBs that those packets
belong to are killed and free'd.
To prevent this race from causing invalid memory accesses, prevent new
URBs from being processed when uvc_stop_streaming() is called by
introducing a new flag "UVC_QUEUE_STOPPING" into the queue, and checking
this when processing the URB to be queued.
With this, we can flush the work queue, and commence a normal pipe
shutdown. Work tasks that are already queued are processed, but the URBs
are prevented from being re-submitted to the USB stack.
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michael Gill [Fri, 9 Mar 2018 02:40:11 +0000 (18:40 -0800)]
staging: apf: Add synchronization for DMA-BUF add/remove
DMA-BUF attachment in the APF driver lacked appropriate locking
guarantees. This patch adds those protections to allow for
concurrent attach/detach calls.
Signed-off-by: Michael Gill <gill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dmaengine: xilinx: dma: Program hardware supported buffer length
AXI-DMA IP supports configurable (c_sg_length_width) buffer length
register width, hence read buffer length (xlnx,sg-length-width) DT
property and ensure that driver doesn't program buffer length
exceeding the supported limit. For VDMA and CDMA there is no change.
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Buffer length is an optional DMA node property. DMA driver will
uses this property to ensure that programmed DMA length doesn't
exceed IP supported buffer length(c_sg_length_width).
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Thu, 8 Mar 2018 06:00:25 +0000 (22:00 -0800)]
dt-bindings: clock: zynqmp: Correct clock names
Some clocks names were intentionally kept incorrect to
match with Linux clock names for backward compatibility.
As now, clock is complete new driver, this is not required
so use proper names for the clocks.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Acked-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: otg: don't clear event buffers when changing to Host mode from Device mode
Clearing event buffers when changing from Device mode -> Host mode
may require allocating event buffers again during role swap from
Host mode -> Device mode. Changing the event buffers at runtime are
not triggering events in device mode and also the role swap can happen
at any time. So, better not to clear the event buffers during role
swap instead reuse the previously allocated event buffers.
This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In current implementation there is a bug where min_bpl value
is not satisfying dma alignment. This patch will fix the issue
by aligning the value properly.
Jeffrey Mouroux [Wed, 7 Mar 2018 01:49:39 +0000 (17:49 -0800)]
media: v4l2-core: Update V4L2 framework with new fourcc codes
New fourcc codes have been added to support additional video
memory layout supported by Xilinx Video IP. These have been
added to the V4L2 framework with this patch.
Harini Katakam [Mon, 5 Mar 2018 13:54:36 +0000 (19:24 +0530)]
net: xilinx: axiethernet: Add USXGMII support
This patch adds support for USXGMII IP in axiethernet driver.
This IP has a MAC similar to 10G/25G IP and supports USXGMII phy protocol.
USXGMII phy supports speeds from 10Mbps to 10Gbps. Only one phy speed
can be advertised at a time and this choice is obtained from the user
via a devicetree property. This patch was tested at 1G and 2.5G speeds.
Since the MAC functionality is similar to 10G/25G, the same mac type is
used in the config structure. USXGMII IP requires a GT reset and this is
added to axienet_device_reset with a check based on mac type.
Hyun Kwon [Fri, 2 Mar 2018 17:24:28 +0000 (09:24 -0800)]
arm64: zynqmp: dt: Add new ZynqMP DP changes
This removes old dt contents from all dts files for ZynqMP DisplayPort
and updates all with new bindings. Please note, some of these changes
are only build-tested.
The DP includes an i2c interface for ddc communication.
drm_dp_aux_register() registers an i2c adapter for it. The function
walks through child nodes of the device node ( = dp node) and tries to
register child nodes as i2c device. This ends up giving bunch or error
messages saying child nodes are not compatible with i2c device bindings
(in of_i2c_register_device()). That's why i2c dummy node was added to
make it clear there's no i2c child device and avoid such error messages.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: emaclite: Use __func__ instead of hardcoded name
Switch hardcoded function name with a reference to __func__ making
the code more maintainable. Address below checkpatch warning:
WARNING: Prefer using '"%s...", __func__' to using 'xemaclite_mdio_read',
this function's name, in a string
+ "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
WARNING: Prefer using '"%s...", __func__' to using 'xemaclite_mdio_write',
this function's name, in a string
+ "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n"
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
XHCI controller may not properly send LFPS.U3_EXIT signalling after
resuming from suspend(D3->D0). To avoid this, lets wait for atleast
1ms after updating the PORTSC_30.PLS to enter U0 from U3. This patch
does the same.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
vdmatest: xilinx: Fix VDMA hang reported in certain resolutions
Avoid enabling circular_park mode for S2MM as it might happen that engine
continuously circles through frame buffers w/o being programmed and lead
to an undesired hang. In loopback it is recommended to use same park mode
configuration for both channels.
Saurabh Sengar [Thu, 1 Mar 2018 09:02:02 +0000 (14:32 +0530)]
drm: xlnx: mixer: Adding mixer 3.0 IP support
Adding mixer 3.0 IP support, this adds one extra overlay layer
ie 8th layer.
Also the logo enable bit is moved to 15th from 8, as 8th bit is
now for 8th newly added layer
fpga: zynqmp: sync driver with xilfpga library enhancements
From 4.0 xilfpga library version onwards it's not required
to strip the Headers for Both Secure and Non-Secure
Bitstream Images created by bootgen.The entry point
interface inside the xilfpga library is changed as follows.
u32 XFpga_PL_BitSream_Load (UINTPTR WrAddr,
UINTPTR KeyAddr, u32 flags);
So the user need not to pass the Size and IV info to the FW.
The FW will collect those parameters from the Image Headers.
Old bootgen command:
bootgen -image bistream.bif -arch ZynqMP -process_bitstream bin
(stripping the Headers).
New bootgen command(2018.1 bootgen):
bootgen -image bitstream.bif -arch zynqmp -o Bitstream.bin
(Without stripping the Headers).
These xilfpga changes are included in PMUFW 1.0 which is required for
running the kernel anyway.
Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jeffrey Mouroux [Fri, 23 Feb 2018 19:15:11 +0000 (11:15 -0800)]
dma: xilinx: Update Framebuffer Driver with support for new 8-bit/10-bit formats
New DRM and V4L2 fourcc codes have been added to the driver
table. Some of these codes are novel and not yet fully
reviewed nor accepted by the respective communities.
Rohit Athavale [Fri, 23 Feb 2018 19:15:09 +0000 (11:15 -0800)]
v4l: xilinx-vpss-csc: Support for any-to-any color space converison
With this commit the driver supports RGB, YUV 444, YUV 422 and
YUV 420 media bus formats. This commit also updates the VPSS CSC
color controls for any-to-any conversion. VPSS CSC requires
coefficients to be brought into an RGB style of coefficients
before color controls can be applied and thus shadow coefficients
are used to track the color controls.
This commit extracts the color depth information from the
DT and uses it configuring the clip max and contrast. This
commit also allows the user to specify 8-bit or 10-bit color
depth via the DT.
Rohit Athavale [Fri, 23 Feb 2018 19:15:03 +0000 (11:15 -0800)]
v4l: xilinx-demosaic: Remove Output Video format register
Remove the redundant register for output video format as the Video
Sensor Demosaic IP can only support output video with RGB format.
Also some typos in logging messages are fixed in this commit.
Rajan Vaja [Wed, 28 Feb 2018 18:38:01 +0000 (10:38 -0800)]
firmware: zynqmp: Add sysfs to set shutdown scope
The Linux shutdown functionality implemented via PSCI system_off does
not include an option to set a scope, i.e. which parts of the system to
shut down.
This patch creates sysfs that allows to set the shutdown scope for the
next shutdown request. When the next shutdown is performed, the platform
specific portion of PSCI-system_off can use the chosen shutdown scope.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Acked-by: Will Wong <willw@xilinx.com> Acked-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Sat, 24 Feb 2018 14:02:53 +0000 (06:02 -0800)]
clk: zynqmp: Allow zero divisor value
Zero divider is valid and default for some of ZynqMP
clocks. Allow zero divisor when CLK_DIVIDER_ALLOW_ZERO
for the clock is set.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Acked-by: Jolly Shah <jollys@xilinx.com> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
v4l: xilinx: dma: Add scaling and padding factor functions
scaling_factor function returns multiplying factor to calculate
bytes per component based on color format.
For eg. scaling factor of YUV420 8 bit format is 1
so multiplying factor is 1 (8/8)
scaling factor of YUV420 10 bit format is 1.25 (10/8)
padding_factor function returns multiplying factor to calculate
actual width of video according to color format.
For eg. padding factor of YUV420 8 bit format: 8 bits per 1 component
no padding bits here, so multiplying factor is 1
padding factor of YUV422 10 bit format: 32 bits per 3 components
each component is 10 bit and the factor is 32/30
Devarsh Thakkar [Tue, 27 Feb 2018 23:34:55 +0000 (15:34 -0800)]
v4l: xilinx: dma: Fix v4l2 enumeration callback for multiplanar
This fixes issues with v4l2 enumeration callback with multiplanar
formats due to which supported multiplanar formats were not getting
enumerated when using VIDEO_ENUM_FMT ioctl.
The intention of existing implementation for multiplanar formats was
to save in array and return the subset of all the v4l2 formats
supported by attached dma device and the supported media bus format
and also cache the supported media bus format so that for future calls
if same media bus format is called then the v4l2 pixel formats can be
directly returned from the entries saved in the array.
This is acheived now with below changes :
a. Use V4L2 subdev helper functions to query supported media bus
format code.
b. Cache the media bus format also for the condition when it is empty
along with whenever new media bus format is detected.
c. Fix NULL pointer deference error by dynamically allocating
memory for poss_v4l2_fmts.
The current v4l driver supports single plane formats. This patch
will add support to handle multi-planar formats. Updated driver
capabilities to multi-planar, where it can handle both single and
multi-planar formats
Jeffrey Mouroux [Tue, 27 Feb 2018 23:34:52 +0000 (15:34 -0800)]
uapi: media: New fourcc codes needed by Xilinx Video IP
The Xilinx Video Framebuffer DMA IP supports video memory formats
that are not represented in the current V4L2 fourcc library. This
patch adds those missing fourcc codes. This includes both new
8-bit and 10-bit pixel formats.
Rohit Athavale [Tue, 27 Feb 2018 23:34:50 +0000 (15:34 -0800)]
media-bus: uapi: Add YCrCb 420 media bus format
This commit adds a YUV 420 media bus format. Currently, one
doesn't exist. VYYUYY8_1X24 does not describe the way the pixels are
sent over the bus, but is an approximation.
Rohit Athavale [Tue, 27 Feb 2018 23:34:49 +0000 (15:34 -0800)]
media: Add new dt-bindings/vf_codes for supported formats
This commit adds new entries to the exisiting vf_codes that are used
to describe the media bus formats in the DT bindings. The newly added
8-bit and 10-bit color depth related formats will need these updates.
projects / zynq / linux.git / log