arm64: zynqmp: Remove ep108 board

ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile
index 6ed51be9bbdbb2369743a2aaaf72d0dcb54e02f2..a74b64e310cbfdce091cce4b2e25672b7dba2338 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -1,4 +1,3 @@
-dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1275-revA.dtb

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi
deleted file mode 100644 (file)
index 12d9fe1..0000000
--- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108-clk.dtsi
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * clock specification for Xilinx ZynqMP ep108 development board
- *
- * (C) Copyright 2015, Xilinx, Inc.
- *
- * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/ {
-       misc_clk: misc_clk {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <25000000>;
-               u-boot,dm-pre-reloc;
-       };
-
-       i2c_clk: i2c_clk {
-               compatible = "fixed-clock";
-               #clock-cells = <0x0>;
-               clock-frequency = <111111111>;
-       };
-
-       sata_clk: sata_clk {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <75000000>;
-       };
-
-       dp_aclk: clock0 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <50000000>;
-               clock-accuracy = <100>;
-       };
-
-       clk100: clk100 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <100000000>;
-       };
-
-       clk600: clk600 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <600000000>;
-       };
-
-       dp_aud_clk: clock1 {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <22579200>;
-               clock-accuracy = <100>;
-       };
-};
-
-&can0 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&can1 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&fpd_dma_chan1 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan2 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan3 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan4 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan5 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan6 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan7 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&fpd_dma_chan8 {
-       clocks = <&clk600>, <&clk100>;
-};
-
-&gem0 {
-       clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
-};
-
-&gpio {
-       clocks = <&misc_clk>;
-};
-
-&i2c0 {
-       clocks = <&i2c_clk>;
-};
-
-&i2c1 {
-       clocks = <&i2c_clk>;
-};
-
-&nand0 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&qspi {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&sata {
-       clocks = <&sata_clk>;
-};
-
-&sdhci0 {
-       clocks = <&misc_clk>, <&misc_clk>;
-};
-
-&sdhci1 {
-       clocks = <&misc_clk>, <&misc_clk>;
-};
-
-&spi0 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&spi1 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&uart0 {
-       clocks = <&misc_clk &misc_clk>;
-};
-
-&usb0 {
-       clocks = <&misc_clk>, <&misc_clk>;
-};
-
-&usb1 {
-       clocks = <&misc_clk>, <&misc_clk>;
-};
-
-&watchdog0 {
-       clocks= <&misc_clk>;
-};
-
-&xilinx_drm {
-       clocks = <&misc_clk>;
-};
-
-&xlnx_dp {
-       clocks = <&dp_aclk>, <&dp_aud_clk>;
-};
-
-&xlnx_dp_snd_codec0 {
-       clocks = <&dp_aud_clk>;
-};
-
-&xlnx_dpdma {
-       clocks = <&misc_clk>;
-};

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
deleted file mode 100644 (file)
index bbe1a20..0000000
--- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
+++ /dev/null
@@ -1,243 +0,0 @@
-/*
- * dts file for Xilinx ZynqMP ep108 development board
- *
- * (C) Copyright 2014 - 2015, Xilinx, Inc.
- *
- * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-/dts-v1/;
-
-#include "zynqmp.dtsi"
-#include "zynqmp-ep108-clk.dtsi"
-
-/ {
-       model = "ZynqMP EP108";
-
-       aliases {
-               ethernet0 = &gem0;
-               mmc0 = &sdhci0;
-               mmc1 = &sdhci1;
-               serial0 = &uart0;
-               spi0 = &qspi;
-               spi1 = &spi0;
-               spi2 = &spi1;
-               usb0 = &usb0;
-               usb1 = &usb1;
-       };
-
-       chosen {
-               bootargs = "earlycon";
-               stdout-path = "serial0:115200n8";
-       };
-
-       memory@0 {
-               device_type = "memory";
-               reg = <0x0 0x0 0x0 0x40000000>;
-       };
-};
-
-&can0 {
-       status = "okay";
-};
-
-&can1 {
-       status = "okay";
-};
-
-&gem0 {
-       status = "okay";
-       phy-handle = <&phy0>;
-       phy-mode = "rgmii-id";
-       phy0: phy@0 {
-               reg = <0>;
-               max-speed = <100>;
-       };
-};
-
-&gpio {
-       status = "okay";
-};
-
-&i2c0 {
-       status = "okay";
-       clock-frequency = <400000>;
-       eeprom@54 {
-               compatible = "atmel,24c64";
-               reg = <0x54>;
-       };
-};
-
-&i2c1 {
-       status = "okay";
-       clock-frequency = <400000>;
-       eeprom@55 {
-               compatible = "atmel,24c64";
-               reg = <0x55>;
-       };
-};
-
-&nand0 {
-       status = "okay";
-       arasan,has-mdma;
-
-       nand@0 {
-               reg = <0x0>;
-               #address-cells = <0x2>;
-               #size-cells = <0x1>;
-               partition@0 {   /* for testing purpose */
-                       label = "nand-fsbl-uboot";
-                       reg = <0x0 0x0 0x400000>;
-               };
-               partition@1 {   /* for testing purpose */
-                       label = "nand-linux";
-                       reg = <0x0 0x400000 0x1400000>;
-               };
-               partition@2 {   /* for testing purpose */
-                       label = "nand-device-tree";
-                       reg = <0x0 0x1800000 0x400000>;
-               };
-               partition@3 {   /* for testing purpose */
-                       label = "nand-rootfs";
-                       reg = <0x0 0x1c00000 0x1400000>;
-               };
-               partition@4 {   /* for testing purpose */
-                       label = "nand-bitstream";
-                       reg = <0x0 0x3000000 0x400000>;
-               };
-               partition@5 {   /* for testing purpose */
-                       label = "nand-misc";
-                       reg = <0x0 0x3400000 0xfcc00000>;
-               };
-       };
-};
-
-&perf_monitor_ocm {
-       status = "disabled";
-};
-
-&qspi {
-       status = "okay";
-       flash@0 {
-               compatible = "m25p80";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               reg = <0x0>;
-               spi-tx-bus-width = <1>;
-               spi-rx-bus-width = <4>;
-               spi-max-frequency = <10000000>;
-               partition@qspi-fsbl-uboot { /* for testing purpose */
-                       label = "qspi-fsbl-uboot";
-                       reg = <0x0 0x100000>;
-               };
-               partition@qspi-linux { /* for testing purpose */
-                       label = "qspi-linux";
-                       reg = <0x100000 0x500000>;
-               };
-               partition@qspi-device-tree { /* for testing purpose */
-                       label = "qspi-device-tree";
-                       reg = <0x600000 0x20000>;
-               };
-               partition@qspi-rootfs { /* for testing purpose */
-                       label = "qspi-rootfs";
-                       reg = <0x620000 0x5E0000>;
-               };
-       };
-};
-
-&sata {
-       status = "okay";
-       ceva,broken-gen2;
-       /* SATA Phy OOB timing settings */
-       ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
-       ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
-       ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
-       ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
-       ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
-       ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
-       ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
-       ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
-};
-
-&sdhci0 {
-       status = "okay";
-       bus-width = <8>;
-       xlnx,mio_bank = <2>;
-};
-
-&sdhci1 {
-       status = "okay";
-       xlnx,mio_bank = <1>;
-};
-
-&spi0 {
-       status = "okay";
-       num-cs = <1>;
-       spi0_flash0: spi0_flash0@0 {
-               compatible = "m25p80";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               spi-max-frequency = <50000000>;
-               reg = <0>;
-
-               spi0_flash0@0 {
-                       label = "spi0_flash0";
-                       reg = <0x0 0x100000>;
-               };
-       };
-};
-
-&spi1 {
-       status = "okay";
-       num-cs = <1>;
-       spi1_flash0: spi1_flash0@0 {
-               compatible = "m25p80";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               spi-max-frequency = <50000000>;
-               reg = <0>;
-
-               spi1_flash0@0 {
-                       label = "spi1_flash0";
-                       reg = <0x0 0x100000>;
-               };
-       };
-};
-
-&uart0 {
-       status = "okay";
-};
-
-&usb0 {
-       status = "okay";
-};
-
-&dwc3_0 {
-       status = "okay";
-       dr_mode = "peripheral";
-       maximum-speed = "high-speed";
-};
-
-&usb1 {
-       status = "okay";
-};
-
-&dwc3_1 {
-       status = "okay";
-       dr_mode = "host";
-       maximum-speed = "high-speed";
-};
-
-&watchdog0 {
-       status = "okay";
-};
-
-&xlnx_dp {
-       xlnx,max-pclock-frequency = <200000>;
-};
-
-&xlnx_dpdma {
-       xlnx,axi-clock-freq = <200000000>;
-};