drm: xlnx: pl_disp: Added plane atomic check function
This patch adds the atomic check helper function to update mode
changed flag and returns error when framebuffer remove functionality
forces to commit without disable crtc.
Without this patch, new DRM framework commits without disable crtc
which leads image corruption and delay in consecutive runs.
Versal watchdog driver uses generic watchdog mode.
Generic watchdog contains closed and open window of equal timeout.
Generic watchdog will generate reset signal if it is not explicitly
refreshed in second window.
watchdog: of_xilinx_wdt: Introduce wdttype enum for identification
There is a need to identify watchdog type that's why new enum was
was introduced to cover it. Move functionality valid only for this
watchdog type if statement.
watchdog: of_xilinx_wdt: Initialize watchdog via data structure
This patch is preparation for adding new watchdog based on this driver.
of_id->data is storing link xwdt_devtype_data which stores watchdog
info and ops pointers to structures.
Based on checkpatch every spinlock should be documented.
The patch is fixing this issue:
./scripts/checkpatch.pl --strict -f drivers/watchdog/of_xilinx_wdt.c
CHECK: spinlock_t definition without comment
+ spinlock_t spinlock;
mtd: rawnand: pl353: Allow raw read/write only for on-die ecc flash parts
When using HW-ECC, do not assign pl353_read_page_raw() and
pl353_write_page_raw() to ecc->write_page_raw and ecc->read_page_raw
hooks. if we do that read and writes will fail. We came to know this,
when running mtd_nandbiterrs test. This test case uses raw read/writes
when assigned but with hw-ecc, causes failures in data read
and writes.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
As per the new devicetree documentation, update the compatible and
clock-names properties.
i.e. add "arm,primecell" as another compatibility
and apb_pclk instead of aclk in clock-names.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
uio: xilinx_ai_engine: Simulate the irq if no hw irq is available
Only when there's no hw irq available and the debugfs is enabled,
simulate the irq. This allows users to trigger the interrupt through
debugfs and helps debug, as some emulation platforms don't even
have the NPI interrupt connected.
v4l: xilinx: scd: Don't mark channel as disabled in .s_stream(0)
Commit 2e77607047c6 ("xilinx: v4l2: dma: Add multiple output support")
incorrectly calls .s_stream(0) on all channels when one of them gets
disabled, causing all the other channels to hang. Work around this by
not disabling the channel in .s_stream(0). The channel will be disabled
in xscd_dma_terminate_all() which should be safe as long as
dmaengine_terminate_all() is called after xvip_pipeline_set_stream().
v4l: xilinx: scd: Cleanup the xscd_dma_chan structure
Cleanup the xscd_dma_chan structure by
- Reordering fields to group them by category
- Renaming the en field to enabled
- Removing the unused chan_node field
- Turning the id field from u8 to unsigned int
xilinx-scenechange.h contains various #include statements not needed by
the header itself but by the multiple .c files that include it. Move
them to the .c files and remove unneeded includes.
v4l: xilinx: scd: Initialize DMA channels in xilinx-scenechange-dma.c
Most of the DMA channel initialization is performed in
xilinx-scenechange-dma.c, but a small part is in
xilinx-scenechange-channel.c. Move all the initialization code to
xilinx-scenechange-dma.c, rename the xscd_dma_chan_probe() function to
xscd_dma_chan_init(), and simplify the code as the function can't fail.
v4l: xilinx: scd: Request IRQ after completing initialization
IRQs can be triggered as soon as they're requested. To ensure a valid
state in the IRQ handler, make sure to request the IRQ after
initializing all components.
v4l: xilinx: scd: Store channel registers address in iomem field
Store the channel registers address instead of the base offset in the
iomem field of the channel structures. This allows accessing the channel
registers without having to compute the offset each time.
Allocating the pads array dynamically doesn't save much memory, if at
all, due to the extra data needed to track the devm allocation, compared
to embedding an array of two pads in the xscd_device structure. Replace
the dynamic allocation.
v4l: xilinx: scd: Refactor the xscd_device structure
Reorder fields to group them by category (system resources,
configuration V4L2 channels, DMA channels), squash the xscd_shared_data
structure with xscd_device and remove duplicated fields.
v4l: xilinx: scd: Compile all SCD source files in a single module
The files xilinx-scenechange.c, xilinx-scenechange-dma.c and
xilinx-scenechange-channel.c are part of the same driver. Compile them
as a single module.
v4l: xilinx: scd: Merge the main and DMA IRQ handlers
Both the main SCD driver and the DMA support code register an IRQ
handler, for the same IRQ. This is unnecessary, we can just call the DMA
IRQ handling function from the main IRQ handler.
v4l: xilinx: scd: Cleanup the DMA engine at remove() time
The resources allocated by the xscd_dma_init() function are never
released. Add a new xscd_dma_cleanup() function to handle the cleanup
and call it at driver remove() time.
v4l: xilinx: scd: Merge the DMA support in the main SCD driver
There's no need to create a separate platform_driver and platform_device
for the DMA support. Merge the xscd_dma_device structure into the
xscd_device. This allows removing duplicating fields, as well as
unneeded code.
v4l: xilinx: scd: Merge the main and V4L2 IRQ handlers
Both the main SCD driver and the V4L2 support code register an IRQ
handler, for the same IRQ. This is unnecessary, we can just call the
V4L2 IRQ handling function from the main IRQ handler.
v4l: xilinx: scd: Merge the V4L2 support in the main SCD driver
There's no need to create a separate platform_driver and platform_device
for the V4L2 support. Call the xilinx-scenechange-channel initialization
function directly from the main driver. This allows removing duplicating
fields, as well as unneeded code.
Move all driver data structures to the xilinx-scenechange.h header. Turn
the cast macros into static inline function and rename them all to
to_<struct name> for consistency.
v4l: xilinx: vipp: Support entity matching on DT subnodes
When the video IP pipeline is parsed in DT, the composite device stores
all entities found in the graph, along with their corresponding DT node.
Later on the DT nodes pointers are used to locate the corresponding V4L2
subdevs by matching them against subdev->dev->of_node.
This mechanism works fine for devices that register a single subdev. For
devices that register multiple subdevs, subdev->dev->of_node points to
the DT node of the device, while the entities parsed from the pipeline
point to child nodes of the device DT node.
The v4l2_subdev structure has a fwnode field that is set to point to the
fwnode corresponding to the device DT node. Drivers that register
multiple subdevs must set the fwnode field manually to the associated
child node of the device DT node. We can thus fix this issue by locating
V4L2 subdevs for an entity based on the subdev fwnode instead of the
dev->of_node.
v4l: xilinx: sdirxss: Fix the media bus formats to 10bpc type
With commit id 563e888fca45a978e4c29b2f5ec5a8a95af60e68, xyavta now
fails to start stream as the media bus format requested is
MEDIA_BUS_FMT_UYVY10_1x20 but the SDI Rx subdev returned media bus
format is MEDIA_BUS_FMT_UYVY8_1x16.
Fix this by updating the driver for correct media bus formats for YUV
422 and 420 10bpc i.e. MEDIA_BUS_FMT_UYVY10_1X20 and
MEDIA_BUS_FMT_VYYUYY10_4X20.
Vishal Sagar [Fri, 29 Mar 2019 06:23:20 +0000 (23:23 -0700)]
v4l: xilinx: tpg: Dynamically modify TPG output format
The TPG output format was fixed based on the device tree. This patch now
allows the TPG output format to be configured at runtime. This is valid
only for the HLS version of TPG.
usb: host: xhci: Add xhci_hcd to xhci_ring for use in stream_timeout_function
This patch modifies the code to pass xhci_hcd in xhci_ring
which would be used by stream_timeout_function() to send
stop command on the stream ring after stream timer gets
timedout.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: otg: Add dependencies required by otg.c and drd.c files
drd.c file supports the simple OTG role swap feature based on the
ULPI pin status and otg.c file supports the TRUE OTG features like
HNP, SRP and also Role swap based on ULPI ID pin.
This patch adds the dependencies required by drd.c and otg.c files.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: otg: Pass dummy address instead of value
dwc3_otg_set_host() stops peripheral mode once the
host initialization is done. The present code logic
detects the host init done based on the value sent
in place of struct usb_bus * ptr. The pointer
value is checked with 0x1 to know whether host is
initialized or not. This patch changes the code
to check against the dummy address value "0xdeadbeef"
instead of value "0x1"
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: otg: Add support for ending HNP session
As a part of sucessful HNP session both A-Device and
B-Device swaps their roles from A-Device: Host->Peripheral
and B-Device: Peripheral->Host. Once the B-Device is done
as Host, the HNP session should be ended to restore to their
previous roles i.e, A-Device: Peripheral->Host and B-Device:
Host->Peripheral. This patch adds a sysfs entry which will
end the HNP session and restore to their original roles.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: route lpd usb traffic through CCI path for making SMMU work
usb dma traffic by default takes the direct DDR path from LPD switch.
Since SMMU is present before CCI, the usb dma traffic needs to be
routed to take the CCI path for making SMMU work. This can be done
by enabling "coherency" in usb.
This patch modifies the code to enable coherency in usb for below
mentioned cases
1. To route usb dma transactions through CCI path for coherency. This is
done when "dma-coherent" property is added into dwc3 dts node.
2. To route usb dma transactions through CCI path to make SMMU work with
usb dma. This is done when "dwc->dev->iommu_group" is populated
(iommu_group is only populated when sucessfull smmu comtext for usb is
created).
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
USB: gadget: f_hid: fix deadlock in f_hidg_write()
In f_hidg_write() the write_spinlock is acquired before calling
usb_ep_queue() which causes a deadlock when dummy_hcd is being used.
This is because dummy_queue() callbacks into f_hidg_req_complete() which
tries to acquire the same spinlock. This is (part of) the backtrace when
the deadlock occurs:
0xffffffffc06b1410 in f_hidg_req_complete
0xffffffffc06a590a in usb_gadget_giveback_request
0xffffffffc06cfff2 in dummy_queue
0xffffffffc06a4b96 in usb_ep_queue
0xffffffffc06b1eb6 in f_hidg_write
0xffffffff8127730b in __vfs_write
0xffffffff812774d1 in vfs_write
0xffffffff81277725 in SYSC_write
Fix this by releasing the write_spinlock before calling usb_ep_queue()
usb: dwc3: otg: mask host/device soft reset from affecting the phy
Setting OCFG.OTGSFTRSTMASK bit masks reset signal issued
either from host or device soft reset from affecting the
reset signal outputs sent to the phy. This patch sets
programs this bit when starting host or peripheral mode
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: otg: make otg driver work along with drd driver
There are 2 drivers which can be used for dwc3 otg feature, they are
discussed below
1. drd.c -> This driver supports the basic Host <-> Peripheral role
swap based on ID PIN sensing. If ID PIN is low the Host
role is switched. When ID PIN is high Peripheral role is
switched
2. otg.c -> This driver is internal driver which supports the TRUE OTG
functionality. Unlike drd.c , this driver supports the OTG
features like HNP (Host Negotiation Protocol) , SRP (Session
Request Protocol) and Host <-> Peripheral swapping (same as
drd.c)
This patch makes the necessary code changes for enabling
otg.c when "CONFIG_USB_DWC3_OTG" is enabled and drd.c when
the "CONFIG_USB_DWC3_DUAL_ROLE" is enabled
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: gadget: Don't kick transfer if LST or SHORT bits are set
When LST bit is set in event->status, indicates that the
transfer is completed and when SHORT bit is set in
event->status, indicates that the transfer completed with
short transfer.
In dwc3_gadget_ep_cleanup_completed_request(), the transfer
should not be started again if any of LST or SHORT bits are
set in the event.This patch modifies the code to check for
LST & SHORT bits before kick starting the transfer
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: Check MISSED ISOC bit only for ISOC endpoints
When streaming is enabled on BULK endpoints and LST bit is set
observed MISSED ISOC bit set in event->status for BULK ep. Since
this bit is only valid for isocronous endpoints, changed the code
to check for isocrnous endpoints when MISSED ISOC bit is set.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: Check for IOC/LST bit in both event->status and TRB->ctrl fields
The present code in dwc3_gadget_ep_reclaim_completed_trb() will check
for IOC/LST bit in the event->status and returns if IOC/LST bit is
set. This logic doesn't work if multiple TRBs are queued per
request and the IOC/LST bit is set on the last TRB of that request.
Consider an example where a queued request has multiple queued TRBs
and IOC/LST bit is set only for the last TRB. In this case, the Core
generates XferComplete/XferInProgress events only for the last TRB
(since IOC/LST are set only for the last TRB). As per the logic in
dwc3_gadget_ep_reclaim_completed_trb() event->status is checked for
IOC/LST bit and returns on the first TRB. This makes the remaining
TRBs left unhandled.
To aviod this, changed the code to check for IOC/LST bits in both
event->status & TRB->ctrl. This patch does the same.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb()
vailability of TRB's is calculated using dwc3_calc_trbs_left(), which
determines total available TRB's based on the HWO bit set in a TRB.
In the present code, __dwc3_prepare_one_trb() is called with a TRB which
needs to be prepared for transfer. This __dwc3_prepare_one_trb() calls
dwc3_calc_trbs_left() to determine total available TRBs and set IOC bit
if the total available TRBs are zero. Since the present working TRB (which
is passed as an argument to __dwc3_prepare_one_trb() ) doesn't yet have
the HWO bit set before calling dwc3_calc_trbs_left(), there are chances
that dwc3_calc_trbs_left() wrongly calculates this present working TRB
as free(since the HWO bit is not yet set) and returns the total available
TRBs as greater than zero (including the present working TRB). This could
be a problem.
This patch corrects the above mentioned problem in __dwc3_prepare_one_trb()
by increementing the dep->trb_enqueue at the last (after preparing the TRB)
instead of increementing at the start and setting the IOC bit only if the
total available TRBs returned by dwc3_calc_trbs_left() is 1 . Since we are
increementing the dep->trb_enqueue at the last, the present working TRB is
also considered as available by dwc3_calc_trbs_left() and non zero value is
returned . So, according to the modified logic, when the total available
TRBs is equal to 1 that means the total available TRBs in the pool are 0.
HNP(Host Negotiation Protocol) is an USB OTG 2.0 feature where the
HOST & DEVICE can swap their roles. Using HNP feature A-device acting
in HOST mode can be role swapped to DEVICE mode and B-device acting in
DEVICE mode can be role swapped to HOST mode.
This feature was broken in earlier releases, so this patch fixes the same
by enabling HNP support before entering into device mode and also avoids
ADevBHostEndEvent getting triggered by waiting for extra time before
enabling events in A-peripheral state, thus giving enough time for HOST
stack on B-device to be loaded.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: gadget: ISOC transfers should be stopped before starting a transfer
For ISOC transfers the requests are not queued until the HOST requests
for data and XferNotReady event is generated .But XferNotReady event
is not getting generated for ISOC transfers for the second time after
Endpoint configuration. Since ISOC packets depend on the XferNotReady
events, they will not be queued to controller. Because of this issue
timeout happens on the application layer.
This patch fixes this issue by issuing END TRANSFER command before
starting any ISOC transfers. Doing so will make the controller clear
the previous allocated endpoint resources and reallocate resources
when the transfer is requested. Because of this change XferNotReady
events will be generated when host requests for the ISOC transfer.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
XHCI controller may not properly send LFPS.U3_EXIT signalling after
resuming from suspend(D3->D0). To avoid this, lets wait for atleast
1ms after updating the PORTSC_30.PLS to enter U0 from U3. This patch
does the same.
usb: dwc3: Correct usb dma mask for making SMMU work in device mode
By default dma_coherent_mask is set to 32 bits, because of this the
virtual address generated by the SMMU is masked to 32 bit width.
Due to this reason, the events generated by the USB DMA are not being
updated to the correct physical address and undefined behaviour is
generated.
This patch corrects the above said problem by reading and setting
the DMA coherent mask based on the GHWPARAMS0.MDWIDTH value.
usb: gadget: uvc_video: unlock before submitting a request to ep
There could be chances where the usb_ep_queue() could fail and trigger
complete() handler with error status. In this case, if usb_ep_queue()
is called with lock held and the triggered complete() handler is waiting
for the same lock to be cleared could result in a deadlock situation and
could result in system hang. To aviod this scenerio, call usb_ep_queue()
with lock removed. This patch does the same.
usb: dwc3: Fix the broken suspend/resume functionality in dwc3
Since the GCTL values are lost after suspend, restore the GCTL
prtcap direction values based on the mode of operation. Doing
so, will fix the host/peripheral functionality after resume.
Due to incorrect programming sequence the "missing peripheral IRQ"
error message gets showed even after finding the correct IRQ.
This patch fixes the code logic for removing this error message
usb: gadget: configfs: Add support for setting maximum supported speed
Since configfs driver determines the current opertaing speed of the
configured usb gadget, add support for setting the maximum_speed
from the configfs directory. This patch does the same.
usb: xhci: don't clean shared_hcd when otg is enabled
Since xhci->shared_hcd contains all the required information
that is needed by otg driver, don't clear the xhci->shared_hcd
during xhci_stop() when otg is enabled
usb: dwc3: don't wait for end transfer to finish for isoc endpoints
Issuing End Transfer command for isocronous endpoints is not
triggering command complete interrupt, so waiting for this
command complete interrupt could endup hanging the system. This
patch modifies the code to not wait for command complete interrupt
after issuing End Transfer command for isoc endpoints.
usb: dwc3: fix the logic for setting GBLHIBERNATIONEN in GCTL
The U3PMU/U2PMU will not save or restore any core state until
GBLHIBERNATIONEN is enabled. This patch fix the code for enabling
GBLHIBERNATIONEN for both host and device mode.
dt-bindings: usb: dwc3: Add flag for supporting hibernation
This patch documents the snps,enable-hibernation devicetree
property , which enables the hibernation support for dwc3
driveer when operating in peripheral mode
usb: dwc3: don't setup event buffers when operating in device mode
This patch skips the initialization of event buffers (which are required
only when USB controller is operation in device or otg mode) when
operating in host only mode.
usb: dwc3: Put usb core in reset after entering D3 state
After entering into D3 mode,the major part of the usb controller except
U3PMU/U2PMU power will be removed.So, it is recommented to put the usb
core in reset after entering D3 mode otherwise undefined behaviour may
occur. This patch does the same.
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