]> rtime.felk.cvut.cz Git - zynq/linux.git/log
zynq/linux.git
6 years agoBluetooth: mark expected switch fall-throughs
Gustavo A. R. Silva [Thu, 12 Oct 2017 22:24:02 +0000 (17:24 -0500)]
Bluetooth: mark expected switch fall-throughs

In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.

In this particular case, notice that I replaced the
"deliberate fall-through..." comment with a "fall through"
comment, which is what GCC is expecting to find.

Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
6 years agoBluetooth: hci_ll: add support for setting public address
David Lechner [Tue, 12 Dec 2017 21:59:16 +0000 (15:59 -0600)]
Bluetooth: hci_ll: add support for setting public address

This adds support for setting the public address on Texas Instruments
Bluetooth chips using a vendor-specific command.

This has been tested on a CC2560A chip. The TI wiki also indicates that
this command should work on TI WL17xx/WL18xx Bluetooth chips.

During review, there was some question as to the correctness of the byte
swapping since TI's documentation is not clear on this matter. This can
be tested with the btmgmt utility from bluez. The adapter must be powered
off to change the address. If the baswap() is omitted, address is reversed.

In case there is a issue in the future, here is the output of btmon during
the command `btmgmt public-addr 00:11:22:33:44:55`:

Bluetooth monitor ver 5.43
= Note: Linux version 4.15.0-rc2-08561-gcb132a1-dirty (armv5tejl)      0.707043
= Note: Bluetooth subsystem version 2.22                               0.707091
= New Index: 00:17:E7:BD:1C:8E (Primary,UART,hci0)              [hci0] 0.707106
@ MGMT Open: btmgmt (privileged) version 1.14                 {0x0002} 0.707124
@ MGMT Open: bluetoothd (privileged) version 1.14             {0x0001} 0.707137
@ MGMT Open: btmon (privileged) version 1.14                  {0x0003} 0.707540
@ MGMT Command: Set Public Address (0x0039) plen 6    {0x0002} [hci0] 11.167991
        Address: 00:11:22:33:44:55 (CIMSYS Inc)
@ MGMT Event: Command Complete (0x0001) plen 7        {0x0002} [hci0] 11.175681
      Set Public Address (0x0039) plen 4
        Status: Success (0x00)
        Missing options: 0x00000000
@ MGMT Event: Index Removed (0x0005) plen 0           {0x0003} [hci0] 11.175757
@ MGMT Event: Index Removed (0x0005) plen 0           {0x0002} [hci0] 11.175757
@ MGMT Event: Index Removed (0x0005) plen 0           {0x0001} [hci0] 11.175757
= Open Index: 00:17:E7:BD:1C:8E                                [hci0] 11.176807
< HCI Command: Vendor (0x3f|0x0006) plen 6                     [hci0] 11.176975
        00 11 22 33 44 55                                .."3DU
> HCI Event: Command Complete (0x0e) plen 4                    [hci0] 11.188260
      Vendor (0x3f|0x0006) ncmd 1
        Status: Success (0x00)
...
< HCI Command: Read Local Version Info.. (0x04|0x0001) plen 0  [hci0] 11.189859
> HCI Event: Command Complete (0x0e) plen 12                   [hci0] 11.190732
      Read Local Version Information (0x04|0x0001) ncmd 1
        Status: Success (0x00)
        HCI version: Bluetooth 2.1 (0x04) - Revision 0 (0x0000)
        LMP version: Bluetooth 2.1 (0x04) - Subversion 6431 (0x191f)
        Manufacturer: Texas Instruments Inc. (13)
< HCI Command: Read BD ADDR (0x04|0x0009) plen 0               [hci0] 11.191027
> HCI Event: Command Complete (0x0e) plen 10                   [hci0] 11.192101
      Read BD ADDR (0x04|0x0009) ncmd 1
        Status: Success (0x00)
        Address: 00:11:22:33:44:55 (CIMSYS Inc)
...

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
6 years agoBluetooth: hci_ll: add constant for vendor-specific command
David Lechner [Mon, 4 Dec 2017 03:21:21 +0000 (21:21 -0600)]
Bluetooth: hci_ll: add constant for vendor-specific command

This adds a #define for the vendor-specific HCI command to set the
baudrate instead of using the bare 0xff36 multiple times.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
6 years agoBluetooth: serdev: hci_ll: Wait for CTS instead of using msleep
David Lechner [Sun, 3 Dec 2017 02:43:55 +0000 (20:43 -0600)]
Bluetooth: serdev: hci_ll: Wait for CTS instead of using msleep

When a TI Bluetooth chip is reset, it takes about 100ms for the RTS line of
the chip to deassert. For my use case with a TI CC2560A chip, this delay
was not long enough and caused the local UART to never transmit at all (TI
AM1808 SoC UART2).

We can wait for the CTS signal using serdev_device_wait_for_cts() instead
of trying to guess using msleep().

Also changed the comment to be more informative while we are touching this
code.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
6 years agoRevert "of: overlay: add overlay symbols to live device tree"
Nava kishore Manne [Tue, 13 Mar 2018 09:41:55 +0000 (15:11 +0530)]
Revert "of: overlay: add overlay symbols to live device tree"

This reverts commit d1651b03c2df75db8eda3fbcd3a07adb337ee8b0.

This commit must be reverted, else loading overlays
from the configfs interface will be fails with the
following errors:
OF: changeset: add_property failed @/__symbols__/...
OF: Error applying changeset (-17)

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Rename XSDFEC_ADD_LDPC IOCTL
Derek Kiernan [Sun, 11 Mar 2018 21:58:55 +0000 (21:58 +0000)]
misc: xilinx-sdfec: Rename XSDFEC_ADD_LDPC IOCTL

To be more explicit.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Rename xsd_ldpc
Derek Kiernan [Sun, 11 Mar 2018 21:58:54 +0000 (21:58 +0000)]
misc: xilinx-sdfec: Rename xsd_ldpc

To be more explicit.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Remove lat_ctrl from xsd_ldpc
Derek Kiernan [Sun, 11 Mar 2018 21:58:53 +0000 (21:58 +0000)]
misc: xilinx-sdfec: Remove lat_ctrl from xsd_ldpc

lat_ctrl is not required with the removal of the Latency Control field
from Reg2.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Remove XSDFEC_REG2_LAT_CTRL_*
Derek Kiernan [Sun, 11 Mar 2018 21:58:52 +0000 (21:58 +0000)]
misc: xilinx-sdfec: Remove XSDFEC_REG2_LAT_CTRL_*

Remove any references to Latency Control field of Reg2 register, the
register has been removed from the SDFEC Block.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Enable SPARSE_IRQ
Mubin Sayyed [Fri, 9 Mar 2018 15:46:19 +0000 (21:16 +0530)]
microblaze: Enable SPARSE_IRQ

Enabling SPARSE_IRQ to use dynamically allocated
irq descriptors.

Signed-off-by: Mubin Sayyed <mubinusm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoirqchip: xilinx: Add support for multiple instances
Mubin Sayyed [Fri, 9 Mar 2018 15:46:18 +0000 (21:16 +0530)]
irqchip: xilinx: Add support for multiple instances

This patch adds support for multiple instances of
xilinx interrupt controller. Below configurations are
supported by driver,

- peripheral->xilinx-intc->xilinx-intc->gic
- peripheral->xilinx-intc->xilinx-intc

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Signed-off-by: Mubin Sayyed <mubinusm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: dt: Add new ZynqMP DP changes
Hyun Kwon [Fri, 9 Mar 2018 18:50:11 +0000 (10:50 -0800)]
arm64: zynqmp: dt: Add new ZynqMP DP changes

This removes old dt contents from all dts files for ZynqMP DisplayPort
and updates all with new bindings. Please note, some of these changes
are only build-tested.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: config: Enable soft IP DRM drivers
Hyun Kwon [Fri, 9 Mar 2018 01:42:31 +0000 (17:42 -0800)]
arm64: zynqmp: config: Enable soft IP DRM drivers

This enables DSI, SDI, Mixer, and the PL display drivers in defconfig.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Acked-by: Saurabh Sengar <saurabhs@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: config: Enable new Xilinx drm configs
Hyun Kwon [Fri, 9 Mar 2018 01:42:30 +0000 (17:42 -0800)]
arm64: zynqmp: config: Enable new Xilinx drm configs

Enable the new DRM configs. Keep the old ones for now,
and the DT can be used to selct one.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xilinx: plane: Use drm_format_plane_width_bytes
Hyun Kwon [Wed, 7 Mar 2018 22:40:36 +0000 (14:40 -0800)]
drm: xilinx: plane: Use drm_format_plane_width_bytes

This will calculate the number of bytes correctly for macropixel
formats.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Reviewed-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xilinx: dp_sub: Add 10 bit YUV formats
Satish Kumar Nagireddy [Wed, 7 Mar 2018 22:40:35 +0000 (14:40 -0800)]
drm: xilinx: dp_sub: Add 10 bit YUV formats

This patch add support for 10 bit YUV formats (XV15 and XV20)
in ZynqMP dp driver.

Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Reviewed-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agouapi: drm: Add AVUY fourcc
Hyun Kwon [Fri, 9 Mar 2018 01:44:23 +0000 (17:44 -0800)]
uapi: drm: Add AVUY fourcc

AVUY is a 32bit single plane YUV format, with 2 bit alpha,
and in order of A:Cr:Cb:Y in little endian.

Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Reviewed-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodevice-tree: serdes: Remove unused lpd register address mapping
Anurag Kumar Vulisha [Thu, 1 Mar 2018 18:25:07 +0000 (23:55 +0530)]
device-tree: serdes: Remove unused lpd register address mapping

This patch removes the unused lpd register address mapping from
serdes dts node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agophy: zynqmp: Use eemi framework for performing ULPI reset sequence
Anurag Kumar Vulisha [Thu, 1 Mar 2018 18:25:06 +0000 (23:55 +0530)]
phy: zynqmp: Use eemi framework for performing ULPI reset sequence

This patch modifies the phy-zynqmp.c driver to use eemi framework
for performing ULPI reset sequence.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agozynqmp: firmware: Add IOCTL enum for performing ULPI reset
Anurag Kumar Vulisha [Thu, 1 Mar 2018 18:25:05 +0000 (23:55 +0530)]
zynqmp: firmware: Add IOCTL enum for performing ULPI reset

This patch adds IOCTL_ULPI_RESET IOCTL enum value that is
passed to eemi framework for performing ULPI reset

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: DRIVER_VERSION Update
Derek Kiernan [Tue, 6 Mar 2018 13:59:14 +0000 (13:59 +0000)]
misc: xilinx-sdfec: DRIVER_VERSION Update

Updated DRIVER_VERSION to "0.3" for 2018.1 SD-FEC drivers updates.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Max # Instances display update
Derek Kiernan [Tue, 6 Mar 2018 13:59:13 +0000 (13:59 +0000)]
misc: xilinx-sdfec: Max # Instances display update

Display 7 as the MAX number of instances. In function xsdfec_probe during
check of "xsdfec_ndevs" to ensure Human Readable.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Fix enum xsdfec_order values
Derek Kiernan [Tue, 6 Mar 2018 13:59:12 +0000 (13:59 +0000)]
misc: xilinx-sdfec: Fix enum xsdfec_order values

Add XSDFEC_ prefix to enum xsdfec_order values. To be consistent.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomisc: xilinx-sdfec: Added GET_CONFIG IOCTL
Derek Kiernan [Tue, 6 Mar 2018 13:59:11 +0000 (13:59 +0000)]
misc: xilinx-sdfec: Added GET_CONFIG IOCTL

To allow validation of Core/Driver configuration.

Signed-off-by: Derek Kiernan <Derek.Kiernan@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoclk: clk-fixed-factor: Use new macro CLK_OF_DECLARE_DRIVER
Rajan Vaja [Thu, 8 Mar 2018 14:15:00 +0000 (06:15 -0800)]
clk: clk-fixed-factor: Use new macro CLK_OF_DECLARE_DRIVER

Fixed factor clock has two initialization at of_clk_init()
time and also during platform driver probe. So declare the
fixed factor clock with CLK_OF_DECLARE_DRIVER instead of
CLK_OF_DECLARE.

See below commit for reference:
"clk: sunxi: apb0: Use new macro CLK_OF_DECLARE_DRIVER"
(sha1: 915128b621a05c63fa58ca9e4cbdf394bbe592f3)

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agouvcvideo: Prevent new URBs being processed at stream stop
Kieran Bingham [Wed, 7 Mar 2018 21:13:29 +0000 (13:13 -0800)]
uvcvideo: Prevent new URBs being processed at stream stop

With asynchronous handling of the URBs from the USB Complete handler, we
get a continual stream of packets being received while we are attempting
to shutdown the stream.

Packets that have already been received and processed are on a
work-queue, but during stream shutdown the URBs that those packets
belong to are killed and free'd.

To prevent this race from causing invalid memory accesses, prevent new
URBs from being processed when uvc_stop_streaming() is called by
introducing a new flag "UVC_QUEUE_STOPPING" into the queue, and checking
this when processing the URB to be queued.

With this, we can flush the work queue, and commence a normal pipe
shutdown. Work tasks that are already queued are processed, but the URBs
are prevented from being re-submitted to the USB stack.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agostaging: apf: Add synchronization for DMA-BUF add/remove
Michael Gill [Fri, 9 Mar 2018 02:40:11 +0000 (18:40 -0800)]
staging: apf: Add synchronization for DMA-BUF add/remove

DMA-BUF attachment in the APF driver lacked appropriate locking
guarantees. This patch adds those protections to allow for
concurrent attach/detach calls.

Signed-off-by: Michael Gill <gill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Cleanup empty lines
Harini Katakam [Thu, 8 Mar 2018 12:45:59 +0000 (18:15 +0530)]
net: macb: Cleanup empty lines

Remove two extra empty lines.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonetworking: introduce and use skb_put_data()
Johannes Berg [Thu, 8 Mar 2018 12:45:58 +0000 (18:15 +0530)]
networking: introduce and use skb_put_data()

A common pattern with skb_put() is to just want to memcpy()
some data into the new space, introduce skb_put_data() for
this.

An spatch similar to the one for skb_put_zero() converts many
of the places using it:

    @@
    identifier p, p2;
    expression len, skb, data;
    type t, t2;
    @@
    (
    -p = skb_put(skb, len);
    +p = skb_put_data(skb, data, len);
    |
    -p = (t)skb_put(skb, len);
    +p = skb_put_data(skb, data, len);
    )
    (
    p2 = (t2)p;
    -memcpy(p2, data, len);
    |
    -memcpy(p, data, len);
    )

    @@
    type t, t2;
    identifier p, p2;
    expression skb, data;
    @@
    t *p;
    ...
    (
    -p = skb_put(skb, sizeof(t));
    +p = skb_put_data(skb, data, sizeof(t));
    |
    -p = (t *)skb_put(skb, sizeof(t));
    +p = skb_put_data(skb, data, sizeof(t));
    )
    (
    p2 = (t2)p;
    -memcpy(p2, data, sizeof(*p));
    |
    -memcpy(p, data, sizeof(*p));
    )

    @@
    expression skb, len, data;
    @@
    -memcpy(skb_put(skb, len), data, len);
    +skb_put_data(skb, data, len);

(again, manually post-processed to retain some comments)a

Picked change for macb driver only.

Reviewed-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agolib/vsprintf.c: remove %Z support
Alexey Dobriyan [Thu, 8 Mar 2018 12:45:57 +0000 (18:15 +0530)]
lib/vsprintf.c: remove %Z support

Now that %z is standartised in C99 there is no reason to support %Z.
Unlike %L it doesn't even make format strings smaller.

Use BUILD_BUG_ON in a couple ATM drivers.

In case anyone didn't notice lib/vsprintf.o is about half of SLUB which
is in my opinion is quite an achievement.  Hopefully this patch inspires
someone else to trim vsprintf.c more.

Picked up change for macb driver only.

Link: http://lkml.kernel.org/r/20170103230126.GA30170@avx2
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Adding Support for Jumbo Frames up to 10240 Bytes in SAMA5D3
vishnuvardhan [Thu, 8 Mar 2018 12:45:56 +0000 (18:15 +0530)]
net: macb: Adding Support for Jumbo Frames up to 10240 Bytes in SAMA5D3

As per the SAMA5D3 device specification it supports Jumbo frames.
But the suggested flag and length of bytes it supports was not updated
in this driver config_structure.
The maximum jumbo frames the device supports :
10240 bytes as per the device spec.

While changing the MTU value greater than 1500, it threw error:
sudo ifconfig eth1 mtu 9000
SIOCSIFMTU: Invalid argument

Add this support to driver so that it works as expected and designed.

Signed-off-by: vishnuvardhan <vardhanraj4143@gmail.com>
[nicolas.ferre@microchip.com: modify slightly commit msg]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrivers: net: generalize napi_complete_done()
Eric Dumazet [Thu, 8 Mar 2018 12:45:55 +0000 (18:15 +0530)]
drivers: net: generalize napi_complete_done()

napi_complete_done() allows to opt-in for gro_flush_timeout,
added back in linux-3.19, commit 3b47d30396ba
("net: gro: add a per device gro flush timer")

This allows for more efficient GRO aggregation without
sacrifying latencies.

Picked up change for macb driver only.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: fix the RX queue reset in macb_rx()
Cyrille Pitchen [Thu, 8 Mar 2018 12:45:54 +0000 (18:15 +0530)]
net: macb: fix the RX queue reset in macb_rx()

On macb only (not gem), when a RX queue corruption was detected from
macb_rx(), the RX queue was reset: during this process the RX ring
buffer descriptor was initialized by macb_init_rx_ring() but we forgot
to also set bp->rx_tail to 0.

Indeed, when processing the received frames, bp->rx_tail provides the
macb driver with the index in the RX ring buffer of the next buffer to
process. So when the whole ring buffer is reset we must also reset
bp->rx_tail so the driver is synchronized again with the hardware.

Since macb_init_rx_ring() is called from many locations, currently from
macb_rx() and macb_init_rings(), we'd rather add the "bp->rx_tail = 0;"
line inside macb_init_rx_ring() than add the very same line after each
call of this function.

Without this fix, the rx queue is not reset properly to recover from
queue corruption and connection drop may occur.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Fixes: 9ba723b081a2 ("net: macb: remove BUG_ON() and reset the queue to handle RX errors")
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Use net_device_stats from struct net_device
Tobias Klauser [Thu, 8 Mar 2018 12:45:53 +0000 (18:15 +0530)]
net: macb: Use net_device_stats from struct net_device

Instead of using a private copy of struct net_device_stats in struct
macb, use stats from struct net_device.

Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomacb: Remove bogus reference to NETIF_F_UFO.
David S. Miller [Thu, 8 Mar 2018 12:45:52 +0000 (18:15 +0530)]
macb: Remove bogus reference to NETIF_F_UFO.

This driver doesn't actually support UFO explicitly yet
it advertises this in netdev->features.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Add ethtool get_ringparam and set_ringparam functionality
Zach Brown [Thu, 8 Mar 2018 12:45:51 +0000 (18:15 +0530)]
net: macb: Add ethtool get_ringparam and set_ringparam functionality

Some applications want to tune the size of the macb rx/tx ring buffers.
The ethtool set_ringparam function is the standard way of doing it.

Signed-off-by: Zach Brown <zach.brown@ni.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocadence: Add LSO support.
Rafal Ozieblo [Thu, 8 Mar 2018 12:45:50 +0000 (18:15 +0530)]
cadence: Add LSO support.

New Cadence GEM hardware support Large Segment Offload (LSO):
TCP segmentation offload (TSO) as well as UDP fragmentation
offload (UFO). Support for those features was added to the driver.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodmaengine: xilinx: dma: Program hardware supported buffer length
Radhey Shyam Pandey [Thu, 8 Mar 2018 09:48:34 +0000 (15:18 +0530)]
dmaengine: xilinx: dma: Program hardware supported buffer length

AXI-DMA IP supports configurable (c_sg_length_width) buffer length
register width, hence read buffer length (xlnx,sg-length-width) DT
property and ensure that driver doesn't program buffer length
exceeding the supported limit. For VDMA and CDMA there is no change.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: DT: dma: Add axi-dma buffer length property
Radhey Shyam Pandey [Thu, 8 Mar 2018 09:48:33 +0000 (15:18 +0530)]
Documentation: DT: dma: Add axi-dma buffer length property

Buffer length is an optional DMA node property. DMA driver will
uses this property to ensure that programmed DMA length doesn't
exceed IP supported buffer length(c_sg_length_width).

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodma: Add support for XV15 and XV20 contiguous formats
Devarsh Thakkar [Thu, 8 Mar 2018 07:37:25 +0000 (23:37 -0800)]
dma: Add support for XV15 and XV20 contiguous formats

This patch updates the framebuffer driver to add support for
XV15 and XV20 contiguous formats.

Signed-off-by: Devarsh Thakkar <devarsht@xilinx.com>
Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: devicetree: bindings: dma: Update fourcc codes for xv15/20
Satish Kumar Nagireddy [Thu, 8 Mar 2018 07:37:26 +0000 (23:37 -0800)]
Documentation: devicetree: bindings: dma: Update fourcc codes for xv15/20

Support for xv15 and xv20 formats have been added to the Xilinx video
framebuffer driver.

Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: vsagar@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l2-core: Update entries for XV15 and XV20 contiguous formats
Devarsh Thakkar [Thu, 8 Mar 2018 07:37:24 +0000 (23:37 -0800)]
v4l2-core: Update entries for XV15 and XV20 contiguous formats

This patch adds missing entries XV20 and XV15 contiguous formats
and fix the warning as format description size is going beyond
32 byte limit.

Signed-off-by: Devarsh Thakkar <devarsht@xilinx.com>
Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: dma: Add XV15 and XV20 contiguous format support
Devarsh Thakkar [Thu, 8 Mar 2018 07:37:23 +0000 (23:37 -0800)]
v4l: xilinx: dma: Add XV15 and XV20 contiguous format support

This patch adds support for XV15 and XV20 contiguous formats
support. Updated with right bitsperpixel for YUV 422 format.

Signed-off-by: Devarsh Thakkar <devarsht@xilinx.com>
Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt-bindings: clock: zynqmp: Correct clock names
Rajan Vaja [Thu, 8 Mar 2018 06:00:25 +0000 (22:00 -0800)]
dt-bindings: clock: zynqmp: Correct clock names

Some clocks names were intentionally kept incorrect to
match with Linux clock names for backward compatibility.
As now, clock is complete new driver, this is not required
so use proper names for the clocks.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Acked-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: xilinx: Add reset support
Swapna Manupati [Wed, 7 Mar 2018 11:33:19 +0000 (17:03 +0530)]
gpio: xilinx: Add reset support

This patch updates xlate api and gpio cells value to
provide reset support for other IP's using axi gpio.

Signed-off-by: Swapna Manupati <swapnam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt-bindings: gpio-xilinx: Update gpio-cells information
Swapna Manupati [Wed, 7 Mar 2018 11:33:18 +0000 (17:03 +0530)]
dt-bindings: gpio-xilinx: Update gpio-cells information

This patch adds extra cell for flags in gpio-cells to reset
other IP's using axi gpio.

Signed-off-by: Swapna Manupati <swapnam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: dwc3: otg: don't clear event buffers when changing to Host mode from Device...
Anurag Kumar Vulisha [Wed, 7 Mar 2018 11:32:17 +0000 (17:02 +0530)]
usb: dwc3: otg: don't clear event buffers when changing to Host mode from Device mode

Clearing event buffers when changing from Device mode -> Host mode
may require allocating event buffers again during role swap from
Host mode -> Device mode. Changing the event buffers at runtime are
not triggering events in device mode and also the role swap can happen
at any time. So, better not to clear the event buffers during role
swap instead reuse the previously allocated event buffers.
This patch does the same.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm: zynq: pl310_edac_l2: Update header file
Jordan Anderson [Tue, 6 Mar 2018 16:22:47 +0000 (09:22 -0700)]
arm: zynq: pl310_edac_l2: Update header file

Changed the header file from edac_core.h, which no
longer exists, to edac_module.h.

Signed-off-by: Jordan Anderson <anderson.jordan59@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: reset the mixer IP before programming
Saurabh Sengar [Tue, 6 Mar 2018 10:50:13 +0000 (16:20 +0530)]
drm: xlnx: mixer: reset the mixer IP before programming

Resetting the HLS IP as soon as gpio driver is probed.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: remove deprecated dmaengine_terminate_all
Saurabh Sengar [Tue, 6 Mar 2018 10:50:12 +0000 (16:20 +0530)]
drm: xlnx: mixer: remove deprecated dmaengine_terminate_all

Replacing dmaengine_terminate_all with dmaengine_terminate_sync,
as the former one is deprecated.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt: bindings: media: xilinx: Remove unimplemented TPG compatible string
Radhey Shyam Pandey [Wed, 7 Mar 2018 09:15:08 +0000 (14:45 +0530)]
dt: bindings: media: xilinx: Remove unimplemented TPG compatible string

TPG compatible string "xlnx,v-tpg-6.0" is not supported in the driver.
Hence remove unimplemented compatible string.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomedia: xilinx: vip: Correct the fourcc code for BGRX8 format.
Vishal Sagar [Wed, 7 Mar 2018 05:20:35 +0000 (10:50 +0530)]
media: xilinx: vip: Correct the fourcc code for BGRX8 format.

Correct the V4L2_PIX_FMT fourcc code for BGRX8 format
to V4L2_PIX_FMT_XBGR32.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodma: xilinx: Correct the V4L fourcc for BGRX8 in framebuffer driver
Vishal Sagar [Wed, 7 Mar 2018 05:20:34 +0000 (10:50 +0530)]
dma: xilinx: Correct the V4L fourcc for BGRX8 in framebuffer driver

Correct the V4L2_PIX_FMT fourcc code for BGRX8 to V4L2_PIX_FMT_XBGR32.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: devicetree: bindings: dma: Correct the BGRX8 format fourcc code
Vishal Sagar [Wed, 7 Mar 2018 05:20:33 +0000 (10:50 +0530)]
Documentation: devicetree: bindings: dma: Correct the BGRX8 format fourcc code

The BGRX8 framebuffer format is corrected for V4L2 Fourcc by changing
V4L2_PIX_FMT_XRGB32 to V4L2_PIX_FMT_XBGR32 in the table.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: Add BGR color format support.
Vishal Sagar [Wed, 7 Mar 2018 04:46:52 +0000 (10:16 +0530)]
v4l: xilinx: Add BGR color format support.

Add support for the new BGR color format supported by Framebuffer
driver.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodma: xilinx: Add support for BGR8 color format in Framebuffer
Vishal Sagar [Wed, 7 Mar 2018 04:46:50 +0000 (10:16 +0530)]
dma: xilinx: Add support for BGR8 color format in Framebuffer

Add support for BGR8 color format (Blue in LSB, 8 bits per component)
in Framebuffer.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: devicetree: bindings: dma: Add support for BGR8 color format
Vishal Sagar [Wed, 7 Mar 2018 04:46:51 +0000 (10:16 +0530)]
Documentation: devicetree: bindings: dma: Add support for BGR8 color format

Add support for BGR8 color format (Blue in LSB, 8 bits per component)
to the Xilinx Video Framebuffer driver.

Signed-off-by: Vishal Sagar <vsagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: dma: Fix bytes per line calculation
Satish Kumar Nagireddy [Wed, 7 Mar 2018 01:49:42 +0000 (17:49 -0800)]
v4l: xilinx: dma: Fix bytes per line calculation

In current implementation there is a bug where min_bpl value
is not satisfying dma alignment. This patch will fix the issue
by aligning the value properly.

Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: dma: Handle 10 bit format calucations for XV20
Satish Kumar Nagireddy [Wed, 7 Mar 2018 01:49:41 +0000 (17:49 -0800)]
v4l: xilinx: dma: Handle 10 bit format calucations for XV20

This patch handle 10 bit calculations for YUV 422 10 bit format

Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: dma: Fix sizeimage calculation
Satish Kumar Nagireddy [Wed, 7 Mar 2018 01:49:40 +0000 (17:49 -0800)]
v4l: xilinx: dma: Fix sizeimage calculation

sizeimage should be calculated using bytesperline instead
of width

Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomedia: v4l2-core: Update V4L2 framework with new fourcc codes
Jeffrey Mouroux [Wed, 7 Mar 2018 01:49:39 +0000 (17:49 -0800)]
media: v4l2-core: Update V4L2 framework with new fourcc codes

New fourcc codes have been added to support additional video
memory layout supported by Xilinx Video IP.  These have been
added to the V4L2 framework with this patch.

Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Signed-off-by: Satish Kumar Nagireddy <satishna@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Remove unnecessary DBW read back from NWCFG
Harini Katakam [Tue, 6 Mar 2018 08:40:44 +0000 (14:10 +0530)]
net: macb: Remove unnecessary DBW read back from NWCFG

The data bus width field is already set based on MAC capability
using macb_dbw function. Remove this unnecessary read back of that
field which might interfere with the correct implementation.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Update macb RX tie-off descriptors
Harini Katakam [Tue, 6 Mar 2018 08:40:43 +0000 (14:10 +0530)]
net: macb: Update macb RX tie-off descriptors

Assign correct descriptor size for RX tie-off descriptors and
use the updated functions for size and bit field to prepare them.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Set rx mode in resume
Harini Katakam [Tue, 6 Mar 2018 08:40:42 +0000 (14:10 +0530)]
net: macb: Set rx mode in resume

Call macb_set_rx_mode in resume to update hash tables and NWCFG
as per netdev flags.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: macb: Add phy suspend and resume
Harini Katakam [Tue, 6 Mar 2018 08:40:41 +0000 (14:10 +0530)]
net: macb: Add phy suspend and resume

Add phy suspend and resume in macb suspend/resume paths because this
will put the phy in a clean power down state and bring it back up
during resume. Without this, the link will not come back up properly
and communication will be erratic/packets will be lost.
This is generic and is applicable to all PHYs.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx: sdirxss: Add support for YUV420 decoding
Vishal Sagar [Tue, 6 Mar 2018 04:53:22 +0000 (10:23 +0530)]
v4l: xilinx: sdirxss: Add support for YUV420 decoding

Add support for YUV420 10bpc decoding from the ST352 payload.

Signed-off-by: Vishal Sagar <vishal.sagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt: bindings: media: xilinx: Add YUV420 decoding support in UHDSDI Rx
Vishal Sagar [Tue, 6 Mar 2018 04:53:23 +0000 (10:23 +0530)]
dt: bindings: media: xilinx: Add YUV420 decoding support in UHDSDI Rx

Updates the documentation for supporting YUV420 10bpc
in UHDSDI Rx Subsystem driver.

Signed-off-by: Vishal Sagar <vishal.sagar@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: sdi: Adding yuv 420 support
Saurabh Sengar [Mon, 5 Mar 2018 06:22:00 +0000 (11:52 +0530)]
drm: xlnx: sdi: Adding yuv 420 support

Adding YUV 420 10 bit color format support for SDI Tx

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx-tpg: Add YUV 420 media bus format support to TPG driver
Rohit Athavale [Tue, 6 Mar 2018 00:03:48 +0000 (16:03 -0800)]
v4l: xilinx-tpg: Add YUV 420 media bus format support to TPG driver

This patch updates the TPG IP driver to add support for the newly
created YUV 420 bus format.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: xilinx: axiethernet: Add USXGMII support
Harini Katakam [Mon, 5 Mar 2018 13:54:36 +0000 (19:24 +0530)]
net: xilinx: axiethernet: Add USXGMII support

This patch adds support for USXGMII IP in axiethernet driver.
This IP has a MAC similar to 10G/25G IP and supports USXGMII phy protocol.
USXGMII phy supports speeds from 10Mbps to 10Gbps. Only one phy speed
can be advertised at a time and this choice is obtained from the user
via a devicetree property. This patch was tested at 1G and 2.5G speeds.
Since the MAC functionality is similar to 10G/25G, the same mac type is
used in the config structure. USXGMII IP requires a GT reset and this is
added to axienet_device_reset with a check based on mac type.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodevicetree: Update documentation for USXGMII
Harini Katakam [Mon, 5 Mar 2018 13:54:37 +0000 (19:24 +0530)]
devicetree: Update documentation for USXGMII

Update USXGMII compatible string and optional properties.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: Fixing wrong stride alignment
Saurabh Sengar [Mon, 5 Mar 2018 06:19:25 +0000 (11:49 +0530)]
drm: xlnx: mixer: Fixing wrong stride alignment

Stride alignment must be 8 X pixels_per_clock value.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: emaclite: Add 'maxlen' description
Radhey Shyam Pandey [Fri, 2 Mar 2018 09:38:37 +0000 (15:08 +0530)]
net: emaclite: Add 'maxlen' description

Add 'maxlen' description. Fixes kernel-doc warning.

drivers/net/ethernet/xilinx/xilinx_emaclite.c:381:
warning: No description found for parameter 'maxlen'

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: emaclite: Remove obsolete else
Radhey Shyam Pandey [Fri, 2 Mar 2018 09:38:36 +0000 (15:08 +0530)]
net: emaclite: Remove obsolete else

Remove else as it is not required with if doing a return.
Fixes below checkpatch warning.

WARNING: else is not generally useful after a break or return

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: emaclite: Balance braces in else statement
Radhey Shyam Pandey [Fri, 2 Mar 2018 09:38:35 +0000 (15:08 +0530)]
net: emaclite: Balance braces in else statement

Add braces to else statements to comply with Linux kernel
coding style' and avoid the following checkpatch message:

'CHECK: Unbalanced braces around else statement'

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: emaclite: Use __func__ instead of hardcoded name
Radhey Shyam Pandey [Fri, 2 Mar 2018 09:38:34 +0000 (15:08 +0530)]
net: emaclite: Use __func__ instead of hardcoded name

Switch hardcoded function name with a reference to __func__ making
the code more maintainable. Address below checkpatch warning:

WARNING: Prefer using '"%s...", __func__' to using 'xemaclite_mdio_read',
this function's name, in a string
+ "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",

WARNING: Prefer using '"%s...", __func__' to using 'xemaclite_mdio_write',
this function's name, in a string
+ "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n"

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agonet: emaclite: Fix line over 80 characters
Radhey Shyam Pandey [Fri, 2 Mar 2018 09:38:33 +0000 (15:08 +0530)]
net: emaclite: Fix line over 80 characters

Fix below line over 80 characters checkpatch warning.

WARNING: line over 80 characters
167: FILE: drivers/net/ethernet/xilinx/xilinx_emaclite.c:167:
170: FILE: drivers/net/ethernet/xilinx/xilinx_emaclite.c:170:
185: FILE: drivers/net/ethernet/xilinx/xilinx_emaclite.c:185:
482: FILE: drivers/net/ethernet/xilinx/xilinx_emaclite.c:482:
675: FILE: drivers/net/ethernet/xilinx/xilinx_emaclite.c:675:

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt-bindings: phy: Fix typo in phy-zynqmp binding doc
Michal Simek [Fri, 2 Mar 2018 08:58:33 +0000 (09:58 +0100)]
dt-bindings: phy: Fix typo in phy-zynqmp binding doc

Issue was reported by checkpatch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: Correcting loop termination condition
Saurabh Sengar [Fri, 2 Mar 2018 01:41:43 +0000 (07:11 +0530)]
drm: xlnx: mixer: Correcting loop termination condition

The layer id starts from 0 and max id should be one less then total count.
The loop was iterating till mixer->layer_cnt, so correcting it to one less.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agocrypto: zynqmp: Use new firmware ops
Rajan Vaja [Thu, 1 Mar 2018 19:32:00 +0000 (11:32 -0800)]
crypto: zynqmp: Use new firmware ops

ZynqMP firmware interface driver has been replaced
with new firmware driver. Use new firmware ops
instead of old firmware APIs in crypto drivers.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Acked-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb: xhci: wait for atleast 1ms after exiting U3
Anurag Kumar Vulisha [Thu, 1 Mar 2018 17:31:13 +0000 (23:01 +0530)]
usb: xhci: wait for atleast 1ms after exiting U3

XHCI controller may not properly send LFPS.U3_EXIT signalling after
resuming from suspend(D3->D0). To avoid this, lets wait for atleast
1ms after updating the PORTSC_30.PLS to enter U0 from U3. This patch
does the same.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Remove ep108 board
Michal Simek [Fri, 2 Mar 2018 07:45:16 +0000 (08:45 +0100)]
arm64: zynqmp: Remove ep108 board

ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agovdmatest: xilinx: Use octal permissions '0444'
Radhey Shyam Pandey [Thu, 1 Mar 2018 11:26:03 +0000 (16:56 +0530)]
vdmatest: xilinx: Use octal permissions '0444'

Fixed following checkpatch warning
WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider
using octal permissions '0444'.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agovdmatest: xilinx: Fix VDMA hang reported in certain resolutions
Radhey Shyam Pandey [Thu, 1 Mar 2018 11:26:02 +0000 (16:56 +0530)]
vdmatest: xilinx: Fix VDMA hang reported in certain resolutions

Avoid enabling circular_park mode for S2MM as it might happen that engine
continuously circles through frame buffers w/o being programmed and lead
to an undesired hang. In loopback it is recommended to use same park mode
configuration for both channels.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agovdmatest: xilinx: Add hsize and vsize module parameter
Radhey Shyam Pandey [Thu, 1 Mar 2018 11:26:01 +0000 (16:56 +0530)]
vdmatest: xilinx: Add hsize and vsize module parameter

Make the horizontal and vertical length configurable. This allows
VDMA IP to be validated for all supported resolution.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: Adding more colors in supported list
Saurabh Sengar [Wed, 28 Feb 2018 14:27:56 +0000 (19:57 +0530)]
drm: xlnx: mixer: Adding more colors in supported list

Adding more colors in mixer's sanity table of color list

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: Adding 10 bit color support
Saurabh Sengar [Thu, 1 Mar 2018 09:02:03 +0000 (14:32 +0530)]
drm: xlnx: mixer: Adding 10 bit color support

Adding 10 bit color format support

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodrm: xlnx: mixer: Adding mixer 3.0 IP support
Saurabh Sengar [Thu, 1 Mar 2018 09:02:02 +0000 (14:32 +0530)]
drm: xlnx: mixer: Adding mixer 3.0 IP support

Adding mixer 3.0 IP support, this adds one extra overlay layer
ie 8th layer.
Also the logo enable bit is moved to 15th from 8, as 8th bit is
now for 8th newly added layer

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodt-bindings: display: xlnx: Modifing mixer compatible string
Saurabh Sengar [Thu, 1 Mar 2018 09:02:01 +0000 (14:32 +0530)]
dt-bindings: display: xlnx: Modifing mixer compatible string

Adding IP version name in compatible string.

Signed-off-by: Saurabh Sengar <saurabhs@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Add the devicetree node for ocm apm node
Shubhrajyoti Datta [Thu, 1 Mar 2018 09:42:27 +0000 (15:12 +0530)]
arm64: zynqmp: Add the devicetree node for ocm apm node

Add the dt node for ocm apm.
Disable this IP on ep108 because it wasn't tested there.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: zynqmp: Remove useless blank line in zynqmp_fpga_remove
Michal Simek [Thu, 1 Mar 2018 10:03:13 +0000 (11:03 +0100)]
fpga: zynqmp: Remove useless blank line in zynqmp_fpga_remove

It removes checkpatch warning.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agofpga: zynqmp: sync driver with xilfpga library enhancements
Nava kishore Manne [Wed, 28 Feb 2018 10:20:35 +0000 (15:50 +0530)]
fpga: zynqmp: sync driver with xilfpga library enhancements

From 4.0 xilfpga library version onwards it's not required
to strip the Headers for Both Secure and Non-Secure
Bitstream Images created by bootgen.The entry point
interface inside the xilfpga library is changed as follows.
u32 XFpga_PL_BitSream_Load (UINTPTR WrAddr,
UINTPTR KeyAddr, u32 flags);

So the user need not to pass the Size and IV info to the FW.
The FW will collect those parameters from the Image Headers.

Old bootgen command:
 bootgen -image bistream.bif -arch ZynqMP -process_bitstream bin
 (stripping the Headers).

New bootgen command(2018.1 bootgen):
 bootgen -image bitstream.bif -arch zynqmp  -o Bitstream.bin
 (Without stripping the Headers).

These xilfpga changes are included in PMUFW 1.0 which is required for
running the kernel anyway.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agodma: xilinx: Update Framebuffer Driver with support for new 8-bit/10-bit formats
Jeffrey Mouroux [Fri, 23 Feb 2018 19:15:11 +0000 (11:15 -0800)]
dma: xilinx: Update Framebuffer Driver with support for new 8-bit/10-bit formats

New DRM and V4L2 fourcc codes have been added to the driver
table. Some of these codes are novel and not yet fully
reviewed nor accepted by the respective communities.

Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: devicetree: bindings: dma: Update for new fourcc code support
Jeffrey Mouroux [Fri, 23 Feb 2018 19:15:10 +0000 (11:15 -0800)]
Documentation: devicetree: bindings: dma: Update for new fourcc code support

Support for more pixel memory formats has been added to the Xilinx Video
Framebuffer driver.

Signed-off-by: Jeffrey Mouroux <jmouroux@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx-vpss-csc: Support for any-to-any color space converison
Rohit Athavale [Fri, 23 Feb 2018 19:15:09 +0000 (11:15 -0800)]
v4l: xilinx-vpss-csc: Support for any-to-any color space converison

With this commit the driver supports RGB, YUV 444, YUV 422 and
YUV 420 media bus formats. This commit also updates the VPSS CSC
color controls for any-to-any conversion. VPSS CSC requires
coefficients to be brought into an RGB style of coefficients
before color controls can be applied and thus shadow coefficients
are used to track the color controls.

This commit extracts the color depth information from the
DT and uses it configuring the clip max and contrast. This
commit also allows the user to specify 8-bit or 10-bit color
depth via the DT.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: media: Update dt-bindings doc for 10-bit color depth in vpss-csc
Rohit Athavale [Fri, 23 Feb 2018 19:15:08 +0000 (11:15 -0800)]
Documentation: media: Update dt-bindings doc for 10-bit color depth in vpss-csc

Add documentation stating support for 10 bit depth for vpss-csc.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoDocumentation: media: Correct dt-bindings doc for Gamma LUT IP
Rohit Athavale [Fri, 23 Feb 2018 19:15:07 +0000 (11:15 -0800)]
Documentation: media: Correct dt-bindings doc for Gamma LUT IP

Correct the IP name from scaler to Gamma LUT and update for
8 and 10-bit color depths.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx-gamma: Fix compile error in debug mode
Rohit Athavale [Fri, 23 Feb 2018 19:15:06 +0000 (11:15 -0800)]
v4l: xilinx-gamma: Fix compile error in debug mode

Variable rb is not declared in DEBUG mode, but is referenced.
This fixes the dev_err logging.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx-gamma: Add kernel-doc for xgamma_dev struct
Rohit Athavale [Fri, 23 Feb 2018 19:15:05 +0000 (11:15 -0800)]
v4l: xilinx-gamma: Add kernel-doc for xgamma_dev struct

This commit adds kernel doc for xgamma_dev struct

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agov4l: xilinx-gamma: Add 10-bit IP support for Video Gammma IP.
Rohit Athavale [Fri, 23 Feb 2018 19:15:04 +0000 (11:15 -0800)]
v4l: xilinx-gamma: Add 10-bit IP support for Video Gammma IP.

This commit adds 10-bit color depth support to the Xilinx Gamma LUT IP
driver. The driver is re-worked to accept color depth from the DT.

Signed-off-by: Rohit Athavale <rathaval@xilinx.com>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>