]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
arm64: zynqmp: devicetree: Add TSU clock
authorHarini Katakam <harini.katakam@xilinx.com>
Fri, 1 Dec 2017 09:22:13 +0000 (14:52 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 1 Mar 2018 08:19:53 +0000 (09:19 +0100)
Add tsu_clk to GEM0/1/2/3 nodes.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi

index b2ef4e3aefb95574d343afc051edabb75b16ded7..4449d5b93d1fbe93011bf9d89ba913e9cc98da9d 100644 (file)
 };
 
 &gem0 {
-       clocks = <&clkc 31>, <&clkc 49>, <&clkc 45>, <&clkc 49>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
+       clocks = <&clkc 31>, <&clkc 49>, <&clkc 45>, <&clkc 49>, <&clkc 44>;
+       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem1 {
-       clocks = <&clkc 31>, <&clkc 50>, <&clkc 46>, <&clkc 50>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
+       clocks = <&clkc 31>, <&clkc 50>, <&clkc 46>, <&clkc 50>, <&clkc 44>;
+       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem2 {
-       clocks = <&clkc 31>, <&clkc 51>, <&clkc 47>, <&clkc 51>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
+       clocks = <&clkc 31>, <&clkc 51>, <&clkc 47>, <&clkc 51>, <&clkc 44>;
+       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem3 {
-       clocks = <&clkc 31>, <&clkc 52>, <&clkc 48>, <&clkc 52>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
+       clocks = <&clkc 31>, <&clkc 52>, <&clkc 48>, <&clkc 52>, <&clkc 44>;
+       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gpio {