]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
tty: uartlite: Enable clocks at probe
authorShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Fri, 20 Apr 2018 11:20:52 +0000 (16:50 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 2 May 2018 06:29:56 +0000 (08:29 +0200)
At probe the uartlite is getting configured.
Enable the clocks before assiging uart and
disable after probe is done.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/tty/serial/uartlite.c

index e0ec023717fe171b087617d4814d7ebf493a6fc7..2df7edf1d724bfd843a629e0104e6d64694ad044 100644 (file)
@@ -779,13 +779,17 @@ static int ulite_probe(struct platform_device *pdev)
                pdata->clk = NULL;
        }
 
-       ret = clk_prepare(pdata->clk);
+       ret = clk_prepare_enable(pdata->clk);
        if (ret) {
                dev_err(&pdev->dev, "Failed to prepare clock\n");
                return ret;
        }
 
-       return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+       ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
+
+       clk_disable(pdata->clk);
+
+       return ret;
 }
 
 static int ulite_remove(struct platform_device *pdev)