Update the clock name to match the IP documentation.
Also document the same in bindings.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Optional properties:
- port-number : Set Uart port number
+- clock-names : Should be "s_axi_aclk"
+- clocks : Input clock specifier. Refer to common clock bindings.
Example:
serial@800C0000 {
if (irq <= 0)
return -ENXIO;
- pdata->clk = devm_clk_get(&pdev->dev, "ulite_clk");
+ pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
if (IS_ERR(pdata->clk)) {
if (PTR_ERR(pdata->clk) != -ENOENT)
return PTR_ERR(pdata->clk);