soc: zynqmp: Added pm api functions for RSA, SHA and AES

This patch adds PM APIs to provided access to xilsecure
library to calculate SHA3 hash on the data or to encrypt
or decrypt the data using AES hardware engine and to
encrypt or decrypt the data by using RSA public or private
keys respectively.

Signed-off-by: Durga Challa <vnsldurg@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/soc/xilinx/zynqmp/firmware.c b/drivers/soc/xilinx/zynqmp/firmware.c
index 7cc1af35d89432100666cd8bd60c757ba4e1414f..cc95e23ea77c3cecc770129edb349f4d6c239fd7 100644 (file)
--- a/drivers/soc/xilinx/zynqmp/firmware.c
+++ b/drivers/soc/xilinx/zynqmp/firmware.c
@@ -383,6 +383,50 @@ int zynqmp_pm_fpga_get_status(u32 *value)
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
 
+/**
+ * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
+ * @address:   Address of the data/ Address of output buffer where
+ *             hash should be stored.
+ * @size:      Size of the data.
+ * @flags:
+ *     BIT(0) - Sha3 init (Here address and size inputs can be NULL)
+ *     BIT(1) - Sha3 update (address should holds the )
+ *     BIT(2) - Sha3 final (address should hold the address of
+ *              buffer to store hash)
+ *
+ * Return:     Returns status, either success or error code.
+ */
+int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
+{
+       u32 lower_32_bits = (u32)address;
+       u32 upper_32_bits = (u32)(address >> 32);
+
+       return invoke_pm_fn(SECURE_SHA, upper_32_bits, lower_32_bits,
+                               size, flags, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
+
+/**
+ * zynqmp_pm_rsa - Access RSA hardware to encrypt/decrypt the data with RSA.
+ * @address:   Address of the data
+ * @size:      Size of the data.
+ * @flags:
+ *             BIT(0) - Encryption/Decryption
+ *                      0 - RSA decryption with private key
+ *                      1 - RSA encryption with public key.
+ *
+ * Return:     Returns status, either success or error code.
+ */
+int zynqmp_pm_rsa(const u64 address, const u32 size, const u32 flags)
+{
+       u32 lower_32_bits = (u32)address;
+       u32 upper_32_bits = (u32)(address >> 32);
+
+       return invoke_pm_fn(SECURE_RSA, upper_32_bits, lower_32_bits,
+                               size, flags, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_rsa);
+
 static int __init zynqmp_plat_init(void)
 {
        struct device_node *np;

diff --git a/include/linux/soc/xilinx/zynqmp/firmware.h b/include/linux/soc/xilinx/zynqmp/firmware.h
index 5beb5988e3de2690247a2de0937d34421b8f0ce3..3fc046ec2950298f1af37db07cb3a9531a5205c6 100644 (file)
--- a/include/linux/soc/xilinx/zynqmp/firmware.h
+++ b/include/linux/soc/xilinx/zynqmp/firmware.h
@@ -80,6 +80,10 @@ enum pm_api_id {
        FPGA_LOAD,
        FPGA_GET_STATUS,
        GET_CHIPID,
+       /* ID 25 is been used by U-boot to process secure boot images */
+       /* Secure library generic API functions */
+       SECURE_SHA = 26,
+       SECURE_RSA,
 };
 
 /* PMU-FW return status codes */
@@ -242,5 +246,7 @@ int zynqmp_pm_mmio_write(const u32 address,
 int zynqmp_pm_mmio_read(const u32 address, u32 *value);
 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);
 int zynqmp_pm_fpga_get_status(u32 *value);
+int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
+int zynqmp_pm_rsa(const u64 address, const u32 size, const u32 flags);
 
 #endif /* __SOC_ZYNQMP_FIRMWARE_H__ */