Fixed PLL initialization on lpc32xx

Signed-off-by: nemecep1 <pavel.nemecek1@gmail.com>

diff --git a/arch/arm/mach-lpc23xx/libs/hal/hal_machperiph.c b/arch/arm/mach-lpc23xx/libs/hal/hal_machperiph.c
index 4585b1efb43d20f0474a4f53336710c460e721b1..88c254abf1fb492b0e2d4111c093256f598a5d83 100644 (file)
--- a/arch/arm/mach-lpc23xx/libs/hal/hal_machperiph.c
+++ b/arch/arm/mach-lpc23xx/libs/hal/hal_machperiph.c
@@ -6,6 +6,15 @@ unsigned int system_frequency = FOSC; /*!< System Clock Frequency (Core Clock)
 
 void system_clock_init(void)
 {
+  
+  // oscilator must be running, before PLL changes
+  SCS = SCS_GPIOM | SCS_OSCEN;
+  // wait for main clock to be ready to use
+  while (!(SCS & SCS_OSCSTAT))
+    continue;   
+  
+  CLKSRCSEL = 1;                          //source is XTAL
+  
   // set PLL multiplier & divisor.
   // values computed from config.h
   PLLCFG = PLLCFG_MSEL | PLLCFG_PSEL;
@@ -16,27 +25,20 @@ void system_clock_init(void)
   PLLCON = PLLCON_PLLE;
   PLLFEED = 0xAA;                       // Make it happen.  These two updates
   PLLFEED = 0x55;                       // MUST occur in sequence.
-
-  CCLKCFG = HCLK_DIV_CPU;                 //only odd values have to be used
-  USBCLKCFG = HCLK_DIV_USB;               //only odd values have to be used
+  
+  // Change the CPU Clock Divider setting for the operation with the PLL. It's critical to do this before connecting the PLL.
+  CCLKCFG = HCLK_DIV_CPU;               //only 0 and odd values have to be used
+  USBCLKCFG = HCLK_DIV_USB;             //only 0 and odd values have to be used
 
   // wait for PLL lock
   while (!(PLLSTAT & PLLSTAT_LOCK))
     continue;
-
+  
   // enable & connect PLL
   PLLCON = PLLCON_PLLE | PLLCON_PLLC;
   PLLFEED = 0xAA;                       // Make it happen.  These two updates
-  PLLFEED = 0x55;                       // MUST occur in sequence.
-
-  SCS = SCS_GPIOM | SCS_OSCEN;
-  // wait for main clock to be ready to use
-  while (!(SCS & SCS_OSCSTAT))
-    continue;    
-
-  CCLKCFG = 0;                            //only 0 and odd values have to be used
-  CLKSRCSEL = 1;                          //source is XTAL
-
+  PLLFEED = 0x55;                       // MUST occur in sequence. 
+  
   system_frequency=CCLK;
 
   // setup & enable the MAM