#include <cpu_def.h>
#include <lt_timer_types.h>
#include <hal_machperiph.h>
+#include <hal_gpio.h>
#ifdef CONFIG_KEYVAL
#include <keyvalpb.h>
#include <lpciap.h>
int i2c_drv_na_timer=0;
#endif /* CONFIG_OC_I2C_DRV_SYSLESS */
+static const unsigned initial_pin_setup[] = {
+ INITIAL_PIN_SETUP_LIST
+};
+
static void sysInit(void)
{
+ int i;
//lpc_pll_off();
//lpc_pll_on();
system_clock_init();
- // setup the parallel port pin
- GPIO0->FIOCLR = P0IO_ZERO_BITS; // clear the ZEROs output
- GPIO0->FIOSET = P0IO_ONE_BITS; // set the ONEs output
- GPIO0->FIODIR = P0IO_OUTPUT_BITS; // set the output bit direction
-
- GPIO1->FIOCLR = P1IO_ZERO_BITS; // clear the ZEROs output
- GPIO1->FIOSET = P1IO_ONE_BITS; // set the ONEs output
- GPIO1->FIODIR = P1IO_OUTPUT_BITS; // set the output bit direction
-
- GPIO2->FIOCLR = P2IO_ZERO_BITS; // clear the ZEROs output
- GPIO2->FIOSET = P2IO_ONE_BITS; // set the ONEs output
- GPIO2->FIODIR = P2IO_OUTPUT_BITS; // set the output bit direction
-
- GPIO3->FIOCLR = P3IO_ZERO_BITS; // clear the ZEROs output
- GPIO3->FIOSET = P3IO_ONE_BITS; // set the ONEs output
- GPIO3->FIODIR = P3IO_OUTPUT_BITS; // set the output bit direction
-
- GPIO4->FIOCLR = P4IO_ZERO_BITS; // clear the ZEROs output
- GPIO4->FIOSET = P4IO_ONE_BITS; // set the ONEs output
- GPIO4->FIODIR = P4IO_OUTPUT_BITS; // set the output bit direction
+ for (i = 0; i < sizeof(initial_pin_setup) / sizeof(initial_pin_setup[0]); i++) {
+ hal_pin_conf(initial_pin_setup[i]);
+ }
}
IRQ_HANDLER_FNC(timer0_isr)
{
unsigned int ir;
- ir=TIM0->IR;
+ ir=LPC_TIM0->IR;
if (ir&0x01) {
do {
if(timer0_isr_appl_call!=NULL)
timer0_isr_appl_call();
- TIM0->MR0 += PCLK / SYS_TIMER_HZ;
- TIM0->IR=0x01; // Clear match0 interrupt
+ LPC_TIM0->MR0 += PCLK / SYS_TIMER_HZ;
+ LPC_TIM0->IR=0x01; // Clear match0 interrupt
#ifdef CONFIG_OC_UL_DRV_SYSLESS
uld_jiffies++;
#endif
}
#endif
sys_timer_ticks++;
- } while (((int32_t)(TIM0->MR0-TIM0->TC))<0);
+ } while (((int32_t)(LPC_TIM0->MR0-LPC_TIM0->TC))<0);
}
return IRQ_HANDLED;
}
request_irq(TIMER0_IRQn, timer0_isr, 0, NULL,NULL);
enable_irq(TIMER0_IRQn);
- TIM0->TC=0;
- TIM0->MCR=0;
+ LPC_TIM0->TC=0;
+ LPC_TIM0->MCR=0;
- TIM0->MR0= PCLK / SYS_TIMER_HZ;
- TIM0->MCR|=1; /* TMCR_MR0_I; */
+ LPC_TIM0->MR0= PCLK / SYS_TIMER_HZ;
+ LPC_TIM0->MCR|=1; /* TMCR_MR0_I; */
- TIM0->TCR = 1; /* Run timer 0*/
+ LPC_TIM0->TCR = 1; /* Run timer 0*/
}
#ifdef CONFIG_STDIO_COM_PORT
int uLanInit()
{
struct ul_drv *udrv;
- unsigned int pinsel1_mask = 0;
- unsigned int pinsel1_set = 0;
- unsigned int pinsel4_mask = 0;
- unsigned int pinsel4_set = 0;
/* set rs485 mode for UART1 */
- #if TXD1_BIT == BIT(15)
- PINCON->PINSEL0 = (PINCON->PINSEL0 & ~0xC0000000) | 0x40000000; /* rxd on P0.15 */
- #elif TXD1_BIT == BIT(0)
- pinsel4_mask |= 3 << (0*2);
- pinsel4_set |= 2 << (0*2);
+ #ifdef TXD1_PIN
+ hal_pin_conf(TXD1_PIN);
#else
- #error TXD1_BIT is not set or valid
+ #error TXD1_PIN is not set or valid
#endif
- #if RXD1_BIT == BIT(16)
- pinsel1_mask |= 3 << ((16-16)*2);
- pinsel1_set |= 1 << ((16-16)*2);
- #elif RXD1_BIT == BIT(1)
- pinsel4_mask |= 3 << (1*2);
- pinsel4_set |= 2 << (1*2);
+ #ifdef RXD1_PIN
+ hal_pin_conf(RXD1_PIN);
#else
- #error RXD1_BIT is not set or valid
+ #error RXD1_PIN is not set or valid
#endif
- #ifdef CTS1_BIT
- #if CTS1_BIT == BIT(17)
- pinsel1_mask |= 3 << ((17-16)*2);
- pinsel1_set |= 1 << ((17-16)*2);
- #elif CTS1_BIT == BIT(2)
- pinsel4_mask |= 3 << (2*2);
- pinsel4_set |= 2 << (2*2);
+ #ifdef CTS1_PIN
+ hal_pin_conf(CTS1_PIN);
#else
- #error CTS1_BIT is not valid
- #endif
+ #error CTS1_PIN is not set or valid
#endif
- #ifdef DSR1_BIT
- #if DSR1_BIT == BIT(19)
- pinsel1_mask |= 3 << ((19-16)*2);
- pinsel1_set |= 1 << ((19-16)*2);
- #elif DSR1_BIT == BIT(4)
- pinsel4_mask |= 3 << (4*2);
- pinsel4_set |= 2 << (4*2);
+ #ifdef DSR1_PIN
+ hal_pin_conf(DSR1_PIN);
#else
- #error CTS1_BIT is not valid
- #endif
+ #error DSR1_PIN is not set or valid
#endif
- #if RTS1_BIT == BIT(22)
- pinsel1_mask |= 3 << ((22-16)*2);
- pinsel1_set |= 1 << ((22-16)*2);
- #elif RTS1_BIT == BIT(7)
- pinsel4_mask |= 3 << (7*2);
- pinsel4_set |= 2 << (7*2);
+ #ifdef RTS1_PIN
+ hal_pin_conf(RTS1_PIN);
#else
- #error RTS1_BIT is not set or valid
+ #error RTS1_PIN is not set or valid
#endif
- /* port 0 .. 0x00003000; 0x00001000; rts(uDIR) */
- PINCON->PINSEL1 = (PINCON->PINSEL1 & ~pinsel1_mask) | pinsel1_set;
- /* port 2 .. 0x00000C0F; 0x0000080A; dsr(rxd), rxd, txd */
- PINCON->PINSEL4 = (PINCON->PINSEL4 & ~pinsel4_mask) | pinsel4_set;
-
udrv=ul_drv_new(UL_DRV_SYSLESS_PORT, /* port */
UL_DRV_SYSLESS_IRQ, /* irq */
UL_DRV_SYSLESS_BAUD, /* baud */
#include <hal_machperiph.h>
#include "uart.h"
#include "serial_reg.h"
+#include "hal_gpio.h"
/* on LPC17xx: UART0 TX-Pin=P0.2, RX-Pin=P0.3
PINSEL0 has to be set to "UART-Function" = Function "01"
volatile int i;
uint32_t baud_div;
- // setup Pin Function Select Register (Pin Connect Block)
- // make sure old values of Bits 0-4 are masked out and
- // set them according to UART0-Pin-Selection
- PINCON->PINSEL0 = (PINCON->PINSEL0 & ~UART0_PINMASK) | UART0_PINSEL;
+ hal_pin_conf(RXD0_PIN);
+ hal_pin_conf(TXD0_PIN);
- UART0->IER = 0x00; // disable all interrupts
+ LPC_UART0->IER = 0x00; // disable all interrupts
//UART0->IIR = 0x00; // clear interrupt ID register
//UART0->LSR = 0x00; // clear line status register
baud_div = (PCLK + baud / 4) / baud;
// set the baudrate - DLAB must be set to access DLL/DLM
- UART0->LCR = (1<<UART0_LCR_DLAB); // set divisor latches (DLAB)
- UART0->DLL = (uint8_t)baud_div; // set for baud low byte
- UART0->DLM = (uint8_t)(baud_div >> 8); // set for baud high byte
+ LPC_UART0->LCR = (1<<UART0_LCR_DLAB); // set divisor latches (DLAB)
+ LPC_UART0->DLL = (uint8_t)baud_div; // set for baud low byte
+ LPC_UART0->DLM = (uint8_t)(baud_div >> 8); // set for baud high byte
// set the number of characters and other
// user specified operating parameters
// Databits, Parity, Stopbits - Settings in Line Control Register
- UART0->LCR = (mode & ~(1<<UART0_LCR_DLAB)); // clear DLAB "on-the-fly"
+ LPC_UART0->LCR = (mode & ~(1<<UART0_LCR_DLAB)); // clear DLAB "on-the-fly"
// setup FIFO Control Register (fifo-enabled + xx trig)
- UART0->FCR = fmode;
+ LPC_UART0->FCR = fmode;
for(i=0;i<65000;i++);
}
int uart0Putch(int ch)
{
- while (!(UART0->LSR & UART_LSR_THRE)) // wait for TX buffer to empty
+ while (!(LPC_UART0->LSR & UART_LSR_THRE)) // wait for TX buffer to empty
continue; // also either WDOG() or swap()
- UART0->THR = (uint8_t)ch; // put char to Transmit Holding Register
+ LPC_UART0->THR = (uint8_t)ch; // put char to Transmit Holding Register
return (uint8_t)ch; // return char ("stdio-compatible"?)
}
int uart0PutchNW(int ch)
{
- if (!(UART0->LSR & UART_LSR_THRE)) // wait for TX buffer to empty
+ if (!(LPC_UART0->LSR & UART_LSR_THRE)) // wait for TX buffer to empty
return -1; // also either WDOG() or swap()
- UART0->THR = (uint8_t)ch; // put char to Transmit Holding Register
+ LPC_UART0->THR = (uint8_t)ch; // put char to Transmit Holding Register
return (uint8_t)ch; // return char ("stdio-compatible"?)
}
int uart0TxEmpty(void)
{
- return (UART0->LSR & (UART_LSR_THRE | UART_LSR_TEMT)) == (UART_LSR_THRE | UART_LSR_TEMT);
+ return (LPC_UART0->LSR & (UART_LSR_THRE | UART_LSR_TEMT)) == (UART_LSR_THRE | UART_LSR_TEMT);
}
void uart0TxFlush(void)
{
- UART0->FCR |= UART_FCR_CLEAR_XMIT; // clear the TX fifo
+ LPC_UART0->FCR |= UART_FCR_CLEAR_XMIT; // clear the TX fifo
}
/* Returns: character on success, -1 if no character is available */
int uart0Getch(void)
{
- if (UART0->LSR & UART_LSR_DR) // check if character is available
- return UART0->RBR; // return character
+ if (LPC_UART0->LSR & UART_LSR_DR) // check if character is available
+ return LPC_UART0->RBR; // return character
return -1;
}
/* Returns: character on success, waits */
int uart0GetchW(void)
{
- while ( !(UART0->LSR & UART_LSR_DR) ); // wait for character
- return UART0->RBR; // return character
+ while ( !(LPC_UART0->LSR & UART_LSR_DR) ); // wait for character
+ return LPC_UART0->RBR; // return character
}
projects / sysless.git / commitdiff