LPC178x: Adapt HAL pin configuration for new pin multiplexer.

The pin function and mode configuration is completely
revamped in LPC178x devices. Adapt HAL support for new
configuration registers organization.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

diff --git a/arch/arm/mach-lpc178x/libs/hal/hal_gpio.c b/arch/arm/mach-lpc178x/libs/hal/hal_gpio.c
index b06ea7f425fce515d80cd3e3c80e2bc13de9aa90..50578ad4387ab5aefc51c605a57d0630d3108d54 100644 (file)
--- a/arch/arm/mach-lpc178x/libs/hal/hal_gpio.c
+++ b/arch/arm/mach-lpc178x/libs/hal/hal_gpio.c
@@ -5,52 +5,42 @@
 
 int hal_pin_conf_fnc(unsigned gpio, int fnc)
 {
-  __IO uint32_t *p = &(PINCON->PINSEL0); 
-  uint32_t mask;
+  __IO uint32_t *p = &(LPC_IOCON->P0_0);
 
   if(fnc & PORT_CONF_FNC_MASK)
     fnc = __mfld2val(PORT_CONF_FNC_MASK, fnc);
 
-  p += hal_gpio_get_port_num(gpio)*2;
-  if(gpio & 0x10)
-    p++;
-  gpio &= 0x0f;
-  gpio *= 2;
-  mask = 3 << gpio;
+  p += hal_gpio_get_port_num(gpio)*32 + (gpio & 0x1f);
 
-  *p = (*p & ~mask) | ((fnc << gpio) & mask);
+  *p = (*p & ~7) | fnc;
 
   return 0;
 }
 
 int hal_pin_conf_mode(unsigned gpio, int mode)
 {
-  __IO uint32_t *p = &(PINCON->PINMODE0); 
-  uint32_t mask;
+  __IO uint32_t *p = &(LPC_IOCON->P0_0);
 
   if(mode & PORT_CONF_MODE_MASK)
     mode = __mfld2val(PORT_CONF_MODE_MASK, mode);
 
-  p += hal_gpio_get_port_num(gpio)*2;
-  if(gpio & 0x10)
-    p++;
-  gpio &= 0x0f;
-  gpio *= 2;
-  mask = 3 << gpio;
+  p += hal_gpio_get_port_num(gpio)*32 + (gpio & 0x1f);
 
-  *p = (*p & ~mask) | ((mode << gpio) & mask);
+  *p = (*p & ~(3 << 3)) | (mode << 3);
 
   return 0;
 }
 
 int hal_pin_conf_od(unsigned gpio, int od)
 {
-  uint32_t mask = 1 << (gpio & 0x1f);
+  __IO uint32_t *p = &(LPC_IOCON->P0_0);
+
+  p += hal_gpio_get_port_num(gpio)*32 + (gpio & 0x1f);
 
   if(od)
-    (&(PINCON->PINMODE_OD0))[hal_gpio_get_port_num(gpio)] |= mask;
+    *p |= (1 << 10);
   else
-    (&(PINCON->PINMODE_OD0))[hal_gpio_get_port_num(gpio)] &= ~mask;
+    *p &= ~(1 << 10);
 
   return 0;
 }

diff --git a/arch/arm/mach-lpc178x/libs/hal/hal_gpio.h b/arch/arm/mach-lpc178x/libs/hal/hal_gpio.h
index 17bb269dc145971161bfd613384d374d7c941e85..c109f00dbf8e367460196e9ae0208838d8962315 100644 (file)
--- a/arch/arm/mach-lpc178x/libs/hal/hal_gpio.h
+++ b/arch/arm/mach-lpc178x/libs/hal/hal_gpio.h
@@ -8,11 +8,11 @@
 #define HAL_GPIO_PORT_BITS 3
 
 static inline
-GPIO_TypeDef *hal_gpio_get_port_base(unsigned port)
+LPC_GPIO_TypeDef *hal_gpio_get_port_base(unsigned port)
 {
-  char *p = (char*)GPIO0_BASE;
-  p += ((char*)GPIO1_BASE - (char*)GPIO0_BASE) * port;
-  return (GPIO_TypeDef *)p;
+  char *p = (char*)LPC_GPIO0_BASE;
+  p += ((char*)LPC_GPIO1_BASE - (char*)LPC_GPIO0_BASE) * port;
+  return (LPC_GPIO_TypeDef *)p;
 }
 
 static inline
@@ -23,7 +23,7 @@ unsigned hal_gpio_get_port_num(unsigned gpio)
 }
 
 static inline
-GPIO_TypeDef *hal_gpio_get_base(unsigned gpio)
+LPC_GPIO_TypeDef *hal_gpio_get_base(unsigned gpio)
 {
   return hal_gpio_get_port_base(hal_gpio_get_port_num(gpio));
 }
@@ -31,22 +31,22 @@ GPIO_TypeDef *hal_gpio_get_base(unsigned gpio)
 static inline
 int hal_gpio_get_value(unsigned gpio)
 {
-  return ((hal_gpio_get_base(gpio)->FIOPIN) >> (gpio & 0x1f)) & 1;
+  return ((hal_gpio_get_base(gpio)->PIN) >> (gpio & 0x1f)) & 1;
 }
 
 static inline
 void hal_gpio_set_value(unsigned gpio, int value)
 {
   if(value)
-    hal_gpio_get_base(gpio)->FIOSET = 1 << (gpio & 0x1f);
+    hal_gpio_get_base(gpio)->SET = 1 << (gpio & 0x1f);
   else
-    hal_gpio_get_base(gpio)->FIOCLR = 1 << (gpio & 0x1f);
+    hal_gpio_get_base(gpio)->CLR = 1 << (gpio & 0x1f);
 }
 
 static inline
 int hal_gpio_direction_input(unsigned gpio)
 {
-  hal_gpio_get_base(gpio)->FIODIR &= ~(1 << (gpio & 0x1f));
+  hal_gpio_get_base(gpio)->DIR &= ~(1 << (gpio & 0x1f));
   return 0;
 }
 
@@ -54,7 +54,7 @@ static inline
 int hal_gpio_direction_output(unsigned gpio, int value)
 {
   hal_gpio_set_value(gpio, value);
-  hal_gpio_get_base(gpio)->FIODIR |= (1 << (gpio & 0x1f));
+  hal_gpio_get_base(gpio)->DIR |= (1 << (gpio & 0x1f));
   return 0;
 }
 

diff --git a/arch/arm/mach-lpc178x/libs/hal/hal_gpio_def.h b/arch/arm/mach-lpc178x/libs/hal/hal_gpio_def.h
index b458151ff1489839639097139fbfac56c333ceba..8f42cde34e9d296afb4baba1a2262aa06410df36 100644 (file)
--- a/arch/arm/mach-lpc178x/libs/hal/hal_gpio_def.h
+++ b/arch/arm/mach-lpc178x/libs/hal/hal_gpio_def.h
@@ -6,35 +6,39 @@
 #endif
 #ifndef PORT_PIN
 #define PORT_PIN(p,n,conf)  (((p)<<PORT_SHIFT) | (n) | (conf))
-#define PORT_CONF_MASK      0xff000000
+#define PORT_CONF_MASK      0xff800000
 #endif
 
-#define PORT_CONF_DIR_MASK  0x01000000
+#define PORT_CONF_DIR_MASK  0x00800000
 #define PORT_CONF_DIR_IN    (0x00000000 | PORT_CONF_SET_DIR)
-#define PORT_CONF_DIR_OUT   (0x01000000 | PORT_CONF_SET_DIR)
+#define PORT_CONF_DIR_OUT   (0x00800000 | PORT_CONF_SET_DIR)
 
-#define PORT_CONF_INIT_MASK 0x02000000
+#define PORT_CONF_INIT_MASK 0x01000000
 #define PORT_CONF_INIT_LOW  0x00000000
-#define PORT_CONF_INIT_HIGH 0x02000000
+#define PORT_CONF_INIT_HIGH 0x01000000
 
-#define PORT_CONF_OD_MASK   0x04000000
+#define PORT_CONF_OD_MASK   0x02000000
 #define PORT_CONF_OD_OFF    0x00000000
-#define PORT_CONF_OD_ON     0x04000000
+#define PORT_CONF_OD_ON     0x02000000
 
-#define PORT_CONF_SET_DIR   0x08000000
-
-#define PORT_CONF_MODE_MASK 0x30000000
+#define PORT_CONF_MODE_MASK 0x0c000000
 #define PORT_CONF_MODE_PU   0x00000000
-#define PORT_CONF_MODE_REP  0x10000000
-#define PORT_CONF_MODE_NORM 0x20000000
-#define PORT_CONF_MODE_PD   0x30000000
+#define PORT_CONF_MODE_REP  0x04000000
+#define PORT_CONF_MODE_NORM 0x08000000
+#define PORT_CONF_MODE_PD   0x0c000000
+
+#define PORT_CONF_SET_DIR   0x10000000
 
-#define PORT_CONF_FNC_MASK  0xc0000000
+#define PORT_CONF_FNC_MASK  0xe0000000
 #define PORT_CONF_FNC_GPIO  0x00000000
 #define PORT_CONF_FNC_0     0x00000000
-#define PORT_CONF_FNC_1     0x40000000
-#define PORT_CONF_FNC_2     0x80000000
-#define PORT_CONF_FNC_3     0xc0000000
+#define PORT_CONF_FNC_1     0x20000000
+#define PORT_CONF_FNC_2     0x40000000
+#define PORT_CONF_FNC_3     0x60000000
+#define PORT_CONF_FNC_4     0x80000000
+#define PORT_CONF_FNC_5     0xa0000000
+#define PORT_CONF_FNC_6     0xc0000000
+#define PORT_CONF_FNC_7     0xe0000000
 
 #define PORT_CONF_GPIO_IN   (PORT_CONF_DIR_IN | PORT_CONF_FNC_GPIO | PORT_CONF_MODE_NORM)
 #define PORT_CONF_GPIO_IN_PU (PORT_CONF_DIR_IN | PORT_CONF_FNC_GPIO | PORT_CONF_MODE_PU)
@@ -47,7 +51,9 @@
 #define PORT_CONF_GPIO_OUT_HI_OD (PORT_CONF_GPIO_OUT_LO | PORT_CONF_OD_ON)
 
 #define PORT_CONF_OUT_LO_NORM (PORT_CONF_DIR_OUT | PORT_CONF_INIT_LOW | PORT_CONF_MODE_NORM)
+#define PORT_CONF_OUT_HI_NORM (PORT_CONF_DIR_OUT | PORT_CONF_INIT_HIGH | PORT_CONF_MODE_NORM)
 #define PORT_CONF_IN_PU       (PORT_CONF_DIR_IN | PORT_CONF_MODE_PU)
+#define PORT_CONF_IN_REP      (PORT_CONF_DIR_IN | PORT_CONF_MODE_REP)
 
 
 #endif /*_HAL_GPIO_H_*/