ASoC: Tegra: correct the print loglevel

Some info prints are wrongly processed as err print

Bug 200042283

Change-Id: I490b4782e5d26d06c0f3c7104ab8c68b94f31888
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/668854
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

firmware: avoid firmware-loading console log spew

Disabled default printing of falcon firmware direct loading
to avoid console log spew.

Bug 200048667

Change-Id: I34b34864f64d44ef009586e7e847041b10b06d67
Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-on: http://git-master/r/660016
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

gpu: nvgpu: implement mapping for sparse allocation

Implement support for partial buffer mappings.

Whitelist gr_pri_bes_crop_hww_esr accessed by
fec during sparse texture initialization.

bug 1456562
bug 1369014
bug 1361532

Change-Id: Ib0d1ec6438257ac14b40c8466b37856b67e7e34d
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/375012
(cherry picked from commit a24470f69961508412402b9b06d5b71fbf6f7549)
Reviewed-on: http://git-master/r/601754
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: Wait PMU finishes booting

GPU PMU booting is in a separate thread(workqueue) and currently
there is a race condition that PMU booting doesn't finish when
"nvhost_gk20a_finalize_power_on" is returning.
If the GPU starts to runtime powergate(nvhost_gk20a_prepare_poweroff)
at that time, we left a unfinished PMU booting workqueue task there.
So next time when this task starts running, GPU will be put into
a bad state which causes lots of GPU errors.
This patch adds a wait at the end of "nvhost_gk20a_finalize_power_on"
, so that the race condition can be avoided.

Bug 200055546

Change-Id: I4f2d0798fcadb4effc555a66f3c3e3061b18d246
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/494065
(cherry picked from commit 3b9866a952ba0a1dea05d20bf32b6bcc9113f38b)
Reviewed-on: http://git-master/r/655952
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

gpu: nvgpu: Add boost once GPU is initialized

Workaround for GPU hang if boost turns GPU on before it is
initialized.

Bug 1435870

Change-Id: I07d0617049612344ca7c494da8cb8d75789984e5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/453375
(cherry picked from commit 260cf3d3fab941126eebf4bc977cb408587492eb)
Reviewed-on: http://git-master/r/655951
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

gpu: nvgpu: Initialize ELPG ref-count early.

gk20a_pmu_disable_elpg can be called before the PMU driver has
received and processed the INIT message from the PMU. If change
ensures that the ELPG ref-count has been initialized to zero
before that can happen.

Bug 200016313
Bug 200055546

Change-Id: Ic80ec1ee69b1eb0499effb1abf556f78cb041f5e
Signed-off-by: Neil Gabriel <ngabriel@nvidia.com>
Reviewed-on: http://git-master/r/431927
Reviewed-on: http://git-master/r/436302
(cherry picked from commit dad127648262a76180259525ac660ffa8307f69b)
Reviewed-on: http://git-master/r/655950
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

Kernel: ar0330: add 960p resolution

Bug 1552628

Change-Id: I90fdbb99bcfb2c20ed1fa0125af6a999bad7b4fc
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/658630
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
Tested-by: Kamal Balagopalan <kbalagopalan@nvidia.com>

arm: tegra: disable pinmux input clamping

Pinmux global control could be configured CLAMP_INPUTS_WHEN_TRISTATED
in bootloader/U-Boot, here is to disable it.

Bug 1551864

Change-Id: If30042237ff4ce8c68ff840b11f438d333285723
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/665717
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

tegra: dc: Check DC max pixel clock supported

Check max clock supported by DC before programming it with
that mode. If the requested pixel clock is greater than the
maximum supported then fall back to default mode: 640x480.

Bug 200031813

Change-Id: Icf1f91fe36e29f2c8c6aefe34d3952948743c3a8
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/666089
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

tegra: jetson: Add support for flash module.

Bug 200062768

Change-Id: I18211dfd4735c868a03bbc62d7f9cea4d0d1af05
Signed-off-by: Jitendra Kumar <jitendrak@nvidia.com>
Reviewed-on: http://git-master/r/662717
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: support for embedded 0x80 SKU

Added DVFS support for CD575MI SKU 0x80
CPU DVFS: Max Freq 2116Mhz. Switch to PLLX below 0 DegC
          and fixed voltage
SOC DVFS: Vmax @ 1100mv constant below 0 DegC
          EMC dvfs max freq 924Mhz
GPU DVFS: Max Freq 924Mhz and thermal bump up of voltage
          by 50mv below 0 DegC. Max gpu freq below 0degC
  is 852Mhz

Bug 1563635

Change-Id: Ic55654c36ed39b96a1262b7243a51d8eaad1b894
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/657110
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

media: tegra_camera: correct the return value of vi2_capture_start

return the status of nvhost_syncpt_wait_timeout_ext
in vi2_capture_start.

Bug 1583009

Change-Id: I2b2ecaf868d0a05e2fa46b23e7eb40ee76aea380
Signed-off-by: Kassey Li <kasseyl@nvidia.com>
Reviewed-on: http://git-master/r/655521
Reviewed-by: Bryan Wu <pengw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Bryan Wu <pengw@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

ata: ahci: enable devsleep only for m-sata

enable devsleep only for m-sata connectors

Bug 1557711

Change-Id: If203e09ec005022e28aa2c4d7ac3816b83419c14
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/662454
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

ARM: dts: tegra: add sata connector property node

Bug 1557711

Change-Id: I25dd3b4efb8e25c010f0173b8509785ebb9a9a3d
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/662418
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

pcie: tegra: boost emc frequency for gen1 and gen2

12MHz frequency for emc is not sufficient in case of high data
transfer using PCIE, hence need to increase emc frequency for
gen1 and gen2 pcie devices to 102MHz and 508MHz respectively.

Bug 1566598

Change-Id: I82c5592dc232ba32eaf6ed959ff78a9966dc6ff1
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/663267
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

gpu: nvgpu: update regops whitelist

Remove an undesired register from the regops whitelist.

Bug 1589712

Change-Id: I76e8ff1f4b68d6d5ce2c11adc08d984df7883e5e
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/663371
(cherry picked from commit 573a71d052ac18d34b5f4e984f8684cedea0396d)
Reviewed-on: http://git-master/r/663998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

SATA: Add Port Multiplier support

Current SATA controller configuration disables PM.
This CL is to enable it.
Support for direct SATA devices has no change.

Bug 1544067

Change-Id: I8f5e2161b687e07608228b9aafb7018808fe0203
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/488162
(Cherry-picked from commit 9a2e7092d0d4977ebbb296b3f1352e6847a2496c)
Reviewed-on: http://git-master/r/493955
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

ARM: tegra12: update pinmux for jetson-tk1

Update pinmux for jetson-tk1 based on
Jetson_TK1_customer_pinmux.xlsm V08

Bug 1551864

Change-Id: I3caee3e1485c95ff1a72b43529aa3c105397b5ac
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/655141
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: enable gpu edp capping for jetson

Enable GPU edp capping for jetson-tk1.Also
update the max_cpu_current and max_gpu_current for
PM375

Bug 1563635

Change-Id: I165440959ba0f23d102f1d89a6c6e9191329305d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/590332
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: add support for 0x80 embedded SKU

Added DVFS support for CD575MI SKU 0x80 always on personality
CPU DVFS: Max Freq 1912Mhz. Switch to PLLX below 0 DegC
          and fixed voltage
SOC DVFS: Vmax 1000mv constant. Lesser freq below 0 DegC
          EMC dvfs max freq 792Mhz
GPU DVFS: Max Freq 756Mhz and thermal bump up of voltage
          by 50mv below 0 DegC
Bug 1563635

Change-Id: Ifa66f4d9905be120a3534acd8f3ab9c2b58eea37
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/557951
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

media: tegra: nvavp: change prints to dev_dbg

Changing dev_info prints to dev_dbg to avoid them from being
printed repeatedly.

bug 1506870

Change-Id: I4a5cabbcea37556271d5afe6f1d367f3f035989b
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/606666
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

ARM: tegra: fix max freq selection

Remove check for required mV less than max mV
because required mV for pllX is different from
dfll

Bug 200059817

Change-Id: Idb34e60479922bdc2913166447d47c5553eafb71
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/656475
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

ARM: tegra: pinmux: correct clk3 & pcc1 group

pcc1 & clk3_req_pee1 pins are moved to correct group

Bug 1551864

Change-Id: Icf106aac866eec02afe7e703f879e5e7f6d722be
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/655140
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: add support for CD575M 24x7 Chip

Added DVFS support for CD575M Always on behaviour.
With this personality configuration for the chip,the
lifetime of the chip increases to 5 Yrs
Operating Temp : -25 to 105 degC
CPU DVFS: Max Freq 1938Mhz. Max Voltage 1.12V
SOC DVFS: Max Voltage0 1.01V EMC dvfs max freq 792Mhz
GPU DVFS: Max Freq 804Mhz and Ma Voltage 1.09V

Bug 1563635

Change-Id: If7fec38b83ae4de8c5435006207fa3cf717384c0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/594855
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Revert "arm: tegra: usb: enable unaligned dma buf support"

This reverts commit 1f73f964718a8752dc285f401749178abc6e3038.
Bug 200055390
Bug 200046201
Bug 200024046

Change-Id: Id97f2e7fde800b3c484aa1e117eea530884922a9
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/605957
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

media: tegra_camera: bypass pixel transform

Disable pixel transform for our L4T/V42L use case.
This patch also add some missing settings for CSI-B.

Bug 1579773

Change-Id: I0f7d81799e5edcae80329d9bdf3d5c56fa9c295d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/604312
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

kernel: driver: modify ar0330 power sequence

Bug 1552628
Bug 1576621

Change-Id: Icc881724f0e4e5c0346aa44ffeb80dc8d498919c
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/598929
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

arm64: boot: dts: Change tegra132-jetson Model

Change Tegra132 Jetson Model to jetson_t132

Bug 1569387

Change-Id: I67e97f821306b802aaaa475efc690c08926be556
Signed-off-by: Mike Thompson <mikthompson@nvidia.com>
Reviewed-on: http://git-master/r/562627
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

arm: tegra12: mc: disable vpr dec error interrupts

Disable vpr dec error interrupts to avoid spurious
mc error messages, which are result of speculative
reads from cpu.

Bug 1550455

Change-Id: I1ea04aec92ba1976dfadbda2e4b1ee7223591296
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/538497
(cherry picked from commit 72d7f6754bae3312140a16626225c3fd14d2e0fb)
Reviewed-on: http://git-master/r/595094
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

android: lowmemkiller: don't consider CMA memory as free

As CMA memory can only be used for Movable allocations,
Android lowmemkiller shouldn't consider this as free memory
for lowmem kill decisions.  If it considered as free memory,
It can delay the killing of apps and lead to slowness of
system as memory allocations start waiting for kswap
daemon to free up the memory.

Bug 1550455

Change-Id: Ica8da48ef48912d89cde526f0ba3676df6ab10f1
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/542209
(cherry picked from commit 24a7d99f9117e250dbf276d453c336b31dc2c127)
Reviewed-on: http://git-master/r/592901
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

video: tegra: dc: increase V_REF_TO_SYNC

Increase V_REF_TO_SYNC value to the maximum size. This adjusts where the flip
activation occurs and permits spool up to include more of the front porch
time.

Bug 1528419

Change-Id: I981d3ffca49c694acf0806279bcf87d92084169c
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/440817
(cherry picked from commit 1c9c042b31735bb1b04780037ba5d7b6aee9fcd2)
Reviewed-on: http://git-master/r/441378
(cherry picked from commit 24afa49b1c471bdd90f06a5cee840d8101761b31)
Reviewed-on: http://git-master/r/592932
Reviewed-by: Automatic_Commit_Validation_User

fs: inode: don't use movable allocations

Movable allocation requests can get CMA memory.
CMA memory is mapped as non-cached normal memory.
f2fs code can perform test_bit operations on the memory
allocated, which inturn uses ldr/str exclusive instuctions
on ARM. ldr/str exclusive instructions casue unhandled
exceptions and kernel panics.

[ 6934.858377] Unhandled fault: unknown 53 (0x96000035) at 0xffffffc0699c1000
[ 6934.866608] Internal error: : 96000035 [#1] PREEMPT SMP
[ 6934.871883] CPU: 1 PID: 666 Comm: LazyTaskWriterT Tainted: G        W    3.10.40-g3bdd559-dirty #39
[ 6934.880975] task: ffffffc06079a040 ti: ffffffc02a7bc000 task.ti: ffffffc02a7bc000
[ 6934.888565] PC is at test_and_clear_bit+0x14/0x40
[ 6934.893304] LR is at f2fs_delete_entry+0xd8/0x28c

Bug 1550455

Change-Id: I9645296a052301820063b9737bf06c8c9e059986
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/533926
(cherry picked from commit 2bae286b8f91c06f384749120596532af9da04ad)
Reviewed-on: http://git-master/r/592900
GVS: Gerrit_Virtual_Submit

Revert "lowmemorykiller: zram space available should be accounted"

This reverts commit b0a90d9e2cbca96e755f7e385665f1be97fa9a69.

This patch causes slow responsiveness of apps as apps would start
waiting for kswap daemon to free memory when memory reaches
to critically low.

Change-Id: I9b6ed33d93a207c93560443152dfb0231215d31f
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/552601
(cherry picked from commit 5c4229269e32b817feb906953ad2221f4aaa8ed1)
Reviewed-on: http://git-master/r/592899
GVS: Gerrit_Virtual_Submit

mm: compaction: don't restrict page isolation during CMA page migration

don't limit the number of pages isolated during CMA page migration.

Bug 1550455

Change-Id: Ib6edcb090b30212302543098a05b85e669ade45d
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/495283
(cherry picked from commit ec9ed2b5c4418c658fe2a3b00b0baf6179b3b452)
Reviewed-on: http://git-master/r/592898
GVS: Gerrit_Virtual_Submit

mm: avoid allocating CMA memory for stack

allocation of CMA memory for user stack would cause
permanent migration failures and result in CMA
allocation failures.

Bug 1550455

Change-Id: I75ac13416dbcf1810c89641cefdd0d56726cc36a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/495322
(cherry picked from commit 3c59fb443605d5975b9d8e250c4ca52ae1650fe5)
Reviewed-on: http://git-master/r/592897
GVS: Gerrit_Virtual_Submit

arm: tegra: retry on vpr update config failure

sleep and retry on vpr update config on failure.

Bug 1517584

Change-Id: Ib3320037aba651de56d2f9f9efcb2cfb9bbdca0a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/494000
(cherry picked from commit 98bf6523b1b2ddc54529aa392a6ec5f111f17c4b)
Reviewed-on: http://git-master/r/592896
GVS: Gerrit_Virtual_Submit

config: add ar0330 support

Bug 1552628

Change-Id: I959eb0e54966d0ad163920a187e37b0b76142433
Signed-off-by: Ming Wong <miwong@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/562206
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

kernel: add ar0330 support

add support for dual ar0330

Bug 1552628

Change-Id: I6ccd6ea0886f17710de3e241c408788cc608dce9
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/558147
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

dts: add ar0261 and ar0330

Add ar0261 and ar0330 in the dts

Bug 1552628

Change-Id: I341c979f7980f3635b28cd24f2b2295375096430
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/562569
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

gpu:nvgpu: update aelpg parameter

Updated aelpg parameter APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT
default value to 200

Bug 1536384
Bug 200043556

Change-Id: I090e50d0025f16c006429455d161bee26fc64173
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/455440
(cherry picked from commit 4442b73ba0a9fb9d9d6c9c19b319146365ebfa96)
Reviewed-on: http://git-master/r/553687
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

tegra: JetsonTK1: Added NVD9A951 camera support

Added NVD9A951 camera module support for Jetson TK1.

Bug 1359310

Change-Id: I5be95fdf16de00fe662f20f52ded9de16aa4aa4e
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555463
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ARM: tegra: laguna-erss: add camera module support

Adds tegra124-pm359-camera-a00.dtsi file and
support for camera module NVD9A951 which consists of
imx135 sensor and dw9718 focuser.

Bug 1359310

Change-Id: I6b377255471566a1e95b2ace8c3f18c5aa230c3f
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555462
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ARM: tegra: ardbeg: add 2.8V supply for dw9718

Add 2.8V supply required by dw9718.

Bug 1359310

Change-Id: I5c2a73e69f321793db819618a9bab62d2935e353
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555461
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

media: tegra: add regulator vana for dw9718

add regulator vana for dw9718

Bug 1259310

Change-Id: I654669b1f02af9b7afbf51e8077a4f8324ead403
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Signed-off-by: Mihir Thakkar <mthakkar@nvidia.com>
Reviewed-on: http://git-master/r/555460
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

tegra: hdmi: Add enable functionality to hotplug

Function handle_enable_l will notify virtual terminals about
new hotplug, triggering notifier call chain to blank/unblank
sequence.

Bug 200045281

Change-Id: Iaa6cbf9ca201dd7ac5f390b79af1dae5eac8b3b0
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/558798
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar S <nkumars@nvidia.com>
Tested-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-by: Jeffery Yu <jefferyy@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: Enable CPU CVB support

- Add cl-dvfs platform data
- Add function call to get cpu clock switch cooling
  device trip points.

Bug 1563635

Change-Id: I07e0a9e8d170543906f91979fb35b98c02fe18cb
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/437195
(cherry picked from commit 55321cec6a72dd9b2e0ad6fb94ff2cc42937a14a)
Reviewed-on: http://git-master/r/559393
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: t12: dvfs: Add CPU CVB entries

- Add CPU  CVB entries for automotive speedo
- Install clock switch cooling device for automotive speedo

Bug 1563635

Change-Id: Ib318f75ade00d6d174996dbc1eb8e02ae1a2a470
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/437194
(cherry picked from commit f0cadfa72c91a055b6ce79f89d0c99b7136a17f5)
Reviewed-on: http://git-master/r/559392
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: t12: clock: Change use_dfll behaviour

- If CONFIG_TEGRA_USE_DFLL_RANGE is set to '3'

  then do not allow use_dfll sysfs to control
  dfll range.

  AND

  during kernel init also, by default dfll
  range becomes 0.

Bug 1563635

Change-Id: I886a6ca365a1ee0fd7619312eca1ccd17d73222b
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/439769
(cherry picked from commit ce3cd984f88d19f5d929c0acbe509486fddcb8bc)
Reviewed-on: http://git-master/r/559391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra: dvfs: Add cpu clock switch cdev

- Add cpu clock switch cooling device to switch
  between PLL and DFLL  dynamically based
  on temperature.

Bug 1563635

Change-Id: I098d41eb64ec53a284db310131c4f604c808645c
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/439762
(cherry picked from commit 5cc4e0b770331dc2096d69b96ee8d27e585d8cde)
Reviewed-on: http://git-master/r/559390
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra: clock: Add dfll clock range control

Add function tegra_clk_dfll_range_control to
change dfll range for any value of 0, 1 or 2.

Bug 1563635

Change-Id: I0b76fd48d102e2e702d88749d71c1bd65a610611
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/439761
(cherry picked from commit 465c6b2738b1b4f7b8a6c3672c47e8d1c5157021)
Reviewed-on: http://git-master/r/559389
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra: Modify TEGRA_USE_DFLL_RANGE

Change TEGRA_USE_DFLL_RANGE to add one more range value
  "3" - DFLL usage is controlled by thermal cooling device

Bug 1563635

Change-Id: Ib8443e0f9574632e0e2370618175fd40132a4488
Signed-off-by: sreenivasulu velpula <svelpula@nvidia.com>
Reviewed-on: http://git-master/r/439760
(cherry picked from commit 930c190253d3253a632d8a3c0e12c08a2e490eef)
Reviewed-on: http://git-master/r/559388
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra12 :emc: update dvfs table for Jetson-TK1

Updated dvfs table for Jetson-tk1 2GB

Bug 200028708

Change-Id: Ia6000916ca7388b6c5f17af6f399a4b11a0ed650
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/495978
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: configs: L4T config for intel7260 wireless

bug  1567414

Change-Id: I9f41f991940016ce6b66777ec10703acef1c96b5
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-on: http://git-master/r/561969
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

gpu: nvgpu: gk20a: check ctx valid bit

When determining the chid for the current context, first check
the ctx valid bit.

Bug 1485555

Change-Id: I6c3096d800a6cef38b656d525437a2c4f8b45774
Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com>
Reviewed-on: http://git-master/r/496140
(cherry picked from commit 20a7a9635e9f969782da6695d99bc99c4ed8fa32)
Reviewed-on: http://git-master/r/555054
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: host: Fix channel refcount issues

This patch fixes few possible races in channel initialisation and
deinitialisation:
- If two channel initialisations were running concurrently for
the same device and the first initialisation failed, we potentially
gave an uninitialised channel to the second requester
- If putchannel() triggered uninitialisation, we were still able
to give the channel in getchannel().

Bug 200013323

Change-Id: I99fa726db99fbb98401d5703cc2572131907f726
(cherry picked from commit 4fb20fef4a9eaf222c3f6d4c83fcb495f207c478)
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/498509
Reviewed-on: http://git-master/r/538725
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

video: tegra: host: Fix debug dump

Currently the debug dump routine is vulnerable against tricky races.
As normal operation is more important than getting the full dump
always, this patch reworks mutex usage in debug dump routine:

 - lock the channel list is now before going through channels. This
   ensures that channel states remain valid even if some of the
   channels were finished during dump.
 - this patch modifies mutex_lock() calls to mutex_trylock() calls.
   This ensures that the function call cannot block.

Bug 1517429

Change-Id: Idf170de196bcededbaec6c9031d268cf2d8bc35d
(cherry picked from commit 544cbc483b973ca1c78173edcf2072434c02b5dd)
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/498508
Reviewed-on: http://git-master/r/538724
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>

video: tegra: host: revise channel refcnt API's

Use only one API to subtract channel refcnts.
To check unbanalaced channel refcnt add WARN_ON when count
goes below zero.
Print error number when channel unmap fails.

Bug 1526504

Change-Id: If88f028a44c9b796d8eaae4affcd0026758cfbe8
(cherry picked from commit f98ce1fc2066e2309af2ef7a52801abadbd40f00)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/496479
Reviewed-on: http://git-master/r/538723
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

video: tegra: host: simplify channel map usage

Use array instead list to hold all channels.
Remove unused references.

Bug 1526504

Change-Id: I49596238d38d5aa78ff32a59b8c0f2c116136a09
(cherry picked from commit 93d7a5f52d3f3aad28187aed15877994d8781cbc)
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/496478
Reviewed-on: http://git-master/r/538722
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra12_defconfig: set 3GB-16MB task size

The previously used 3GB-24MB task size caused relocation failures when
loading kernel modules. This happened because part of the module loading
area got beyond the 32MB relocation range from kernel .text segment.
This problem is ARM32-specific and does not affect ARM64.

Bug 1489463

Change-Id: I255eb605988b3095d49f05d4d4b199bf2c796bfd
Signed-off-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-on: http://git-master/r/553996
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>

arm: tegra12_defconfig: make audio drivers inbuilt

Revert previous changes to modularize the audio drivers. The module
probe/remove paths of these drivers are untested and buggy. Make these
drivers built-in until the bugs are worked out, and schedule allows
for thorough testing.

Bug 1536426

Change-Id: Ic1698e7205b1d97461051cd1e25a513dac9649fe
Signed-off-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-on: http://git-master/r/554287
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

ASoC: tegra: fix avp module remove

- avp module remove should not try to release client
  if avp pcm open was never called and client was
  never allocated

- avp module remove should deregister offload ops

Bug 200043253

Change-Id: I11a6d65afab4d88aa5669553809e99fd69cfd000
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/554153
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

mmc: sdhci: tegra: initialize local variable

Initialize uninitialized variable
vmin_tap_hole & vmax_tap_hole

Bug 200042035

Change-Id: I5e9303f2b585423d936b289a59228028275ec5ec
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/542582
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

firmware: enable default printing of direct loading

Move pr_dbg to pr_info for direct firmware loading.

Bug 200026940

Change-Id: I617fde8aac85be01857b963c0e18ae6cf22aa444
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/542581
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra12_defconfig: max98090 as loadable module

Bug 1550880

Change-Id: I6278cde7643dd3b298d72c54497cb5274a5de544
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/551903
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

soc: codecs: max98090: free_irq during module remove

Bug 1550880

Change-Id: I54697780893c17a1c117483fd9bf271ba31209d4
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/551902
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

soc: tegra: max98090: laguna: fix error return paths

- Remove switch_dev_unregister and call tegra_asoc_switch_unregister
instead in error return path corresponding to tegra_asoc_switch_register.

- Skip max97236 registration for laguna erss platorm.

Issues surfaced out on making max98090 as removable KO module.

Bug 1550880

Change-Id: I6a6c0185a3980efab3592f0733bda214aac4fc81
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/551901
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

asoc: rt5639: fix missing regmap_exit during remove

without regmap_exit in remove, next modprobe of
modprobe used to complain of
"Failed to create debugfs directory"
due to stale debugfs directory.

Bug 200038898

Change-Id: Ie6373f40b50c1307ee7d114dc0f44164c4b426eb
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/542646
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

gpu: nvgpu: Increase PBDMA timeout

PBDMA timeout can cause stale data in FIFO. Default value equals 1ms.
Increase it to max.

Bug 1537636

Change-Id: I1c6c6b10abaece3a64b77b9b3ef77ff726ff67cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457047
(cherry picked from commit f516652f567a44e2e1c6313dccd3dc80172a980f)
Reviewed-on: http://git-master/r/457067
(cherry picked from commit f5219cf5888502de3f6cabb2db3e8968b6d20b7c)
Reviewed-on: http://git-master/r/504534
Reviewed-by: Automatic_Commit_Validation_User

media: tegra_v4l2_camera: set clock rate for pll_d

Test pattern generator in VI needs PLL_D running at certain clock
rate, then CSI clock is a child of PLL_D can get the right clock
for operation.

If DC disable DSI and set PLL_D as a very low frequency and VI driver
forgets to set PLL_D rate back, test pattern generator won't work.

This patch will set PLL_D as 927M when we do test pattern generator
testing.

Bug 1515755

Change-Id: I8fd27d193a436e1057ce2bce8f8153630dc5cdce
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/489043
(cherry picked from commit e09393ad2a02309f63a3baeb567460e1e2f79cd9)
Reviewed-on: http://git-master/r/498938
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

ARM: ardbeg: enable imx135 V4L2 sensor driver

Bug 1380143

Change-Id: I9292465b0652c5287db6bbc97a08c76c1ad48484
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/337471
(cherry picked from commit e83a8827e9888f567a5859ecac6a1041edcf0db9)
Reviewed-on: http://git-master/r/498937
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

media: tegra_camera: vi2: support for real sensor

Add code to support RAW10 capture from real sensor like IMX135.
Add flag to skip register program from second frame.
Fix sync point operations.

Bug 1380143

Change-Id: I19bcd17ddfba0e16b4b3a34ae8a4e5a0119e85e1
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/337470
(cherry picked from commit ff1055fa436ffb5c1d57eee2e09c17578774d65f)
Reviewed-on: http://git-master/r/498936
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

media: soc_camera: add imx135 sensor driver

Sony IMX135 camera sensor can be found on Ardbeg/Laguna. This patch
introduced sensor driver for imx135 using soc_camera interface.

Bug 1380143

Change-Id: Ifa0becf1ec2d9931ebf9ea3a4e9ea3e1013a9e36
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/337469
(cherry picked from commit 94a04c2c9b614519aab6f718d60bcf1d8032aa8f)
Reviewed-on: http://git-master/r/498935
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: nvmap: remove support for Deprecated GET_ID/FROM_ID ioctl's

Remove support and add warning message for deprecated IOCTL's -
NVMAP_IOC_FROM_ID and NVMAP_IOC_GET_ID. These ioctl calls
are deprecated by corresponding FD ioctl calls.

Bug 1553082

Change-Id: I3cd531422293f19496687f346692fa91ebe58a40
Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com>
Reviewed-on: http://git-master/r/498045
(cherry picked from commit 420dce0a99231453ebbd091f110d0de816e4885e)
Reviewed-on: http://git-master/r/538987
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: nvmap: fix use-after-free race condition

Incremented nvmap_handle ref count in utility function
nvmap_get_id_from_dmabuf_fd() before the function release reference
to dma buffer. This is required to avoid race conditions in nvmap
code where nvmap_handle returned by this function could be freed
concurrently while the caller is still using it.

As a side effect of above change, every caller of this utility
function must decrement nvmap_handle ref count after using the
returned nvmap_handle.

Bug 1553082

Change-Id: Iffc2e5819f8b493d5ed95a9d0c422ccd52438965
Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com>
Reviewed-on: http://git-master/r/498135
(cherry picked from commit afddea745cc4f4a824be501ecbbb50f55e7e6f04)
Reviewed-on: http://git-master/r/538986
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: nvmap: cleanup redundant functions

Removed redundant function unmarshal_user_id() and replaced it with
unmarshal_user_handle() which it internally calls without any other
changes.

Bug 1553082

Change-Id: I7d998966c593f11a3322b0503ef11311fc1ae5e7
Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com>
Reviewed-on: http://git-master/r/498103
(cherry picked from commit 4880b6c2bdf5b10e4a71b5b79e7878343b9e7e3b)
Reviewed-on: http://git-master/r/538985
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

ARM: tegra12: add clock preinit code for U-Boot

U-Boot doesn't setup clock as NVTBoot or fastboot, so clocks need to
be preinit before our normal clock init.

Bug 1482099

Change-Id: I5ad8dc7e61f1ad4864410a808c41298a91c7198f
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/408427
(cherry picked from commit 6682ca58527e47fe6db40855d2deba48a6d321d3)
Reviewed-on: http://git-master/r/500873
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

ARM: tegra12: config: enable clock preinit code

Enable clock preinit code by default for U-Boot.

Bug 1482099

Change-Id: I72fa1e9b45f580813846c7506efec5a03347efcd
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/408428
(cherry picked from commit 8f2ff20c410a8b7a25e4132e6a194117e4f74361)
Reviewed-on: http://git-master/r/500874
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

video: tegra: host: gk20a: reduce gr delays

The delay value used in gr usleep_range calls is
too high. We can start at a much lower value.

Bug 200032452

Change-Id: I7d196d0e3be0a5cd84e8c4dad537fae043da6274
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/335234
(cherry picked from commit 49bb8436a534496c70e6238d3bc20ed280d5b654)
Reviewed-on: http://git-master/r/504632
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

edp: sysedp : CPU/GPU priority depends on fGPU

Provide sysedp_dynamic_capping with the instantaneous GPU frequency
when notifying it of the GPU load. Modify the gpu/cpu priority
decision logic to choose CPU priority until GPU frequency gets "near"
the CPU-priority-limited-GPU-fmax. Introduce the priority_bias debugfs
parameter to facilitate tuning of "near". priority_bias takes a value
from 0 to 100.

Change-Id: I57df17d50cd8077a512b5932f4a304ca5e6992aa
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/481720
(cherry picked from commit b2ac745a45e273e849d7b190913ee97092fdebc2)
Reviewed-on: http://git-master/r/498901
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

asoc: rt56xx: fix missing device_remove_file

added missing device_remove_file during device remove
this resulted failure in modprobe of module

Bug 200038187
Bug 200037087

Change-Id: Ibbe8cf92162144d438f5b563bf6d2b9787acc04e
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/499745
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Zheng Liu <zhliu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

video: tegra: dc: Avoid FRAME_END_INT conflict

Allowing for dc->lock to be acquired by the
caller in function tegra_dc_config_frame_end_intr
can result in FRAME_END_INT mask register being
overwritten if the lock is actually acquired by
another thread.

Refactor the critical section into its own function
and allow callers to call either function. Also
Change the name of tegra_dc_wait_for_frame_end
to indicate that it should be called with dc->lock
locked.

Bug 1534724

Change-Id: I87b1fc529f29f707a1bdadf18efa6bb19d6966b3
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/456988
(cherry picked from commit ec9b7f555b9648e3aee0cd9781a92b14178a3344)
Reviewed-on: http://git-master/r/496581
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

video: tegra: dc: Fix and refactor FRAME_END_INT

- Fix a conflict with other DC interrupt masks
  when the DSI driver waits on FRAME_END_INT
- Move generic FRAME_END_INT mask/unmask and
  wait-for functions to dc.c

Bug 1534724

Change-Id: I40e26ada2f0494782979e32c1a22906361b214b5
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/451186
(cherry picked from commit 24a39c49f63eea704003ee27296f1f70d46bcbd0)
Reviewed-on: http://git-master/r/496580
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ata: Skip ahci dump call if probe is not ivoked

Skip ahci dump call if probe is not ivoked and even if
CONFIG_TEGRA_SATA_IDLE_POWERGATE is not defined

Bug 200010376

Change-Id: I4ec5f6643b3bc0dbbebbd65b6085d9ea2353eac1
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/455571
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra12: jetson-tk1: add debounce to power key

Continuous press & release of power key during resume
cause power key to generate continious interrupt
leading to hang of device. So add debounce time

Bug 200037478

Change-Id: Ia3081700af3291813450dda7205f842f511e63db
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/499296
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

arm: tegra: Ram repair for slow cluster

Do ram repair for slow cluster also during
boot

Bug 1528461

Change-Id: I71ed7891aaff48f0b87438ad029b22ced9be0f04
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/494787
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

ASoC: Tegra: Fix double regulator disable

digital_reg was disabled second time instead of codec_reg

Bug 200036995

Change-Id: I8e9b3aeafa613a5a58063b88ee81bf3d0aaf4e43
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/498837
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

usb: xhci: tegra: remove PCIe dependency

PCIe powergating dependency is now handled internally in the powergating module
for t12x/t13x. This patch removes PCIe related powergating calls from XHCI
driver for tegra.

Bug 1451279
Bug 1524744
Bug 200027067

Change-Id: I0752cd745f218266e1636cc7c40a6c29dee3b3d4
Reviewed-on: http://git-master/r/424036
(cherry picked from commit 91e2bd6728ca1969615081c70be6b2f21acd43d5)
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/498662
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra: power: add pcie dependency to xusb ops

Due to a HW bug 1320346 in t12x/t13x, PCIE needs to be unpowergated when XUSB
is to be accessed.  Currently PCIE powergating ops need to be invoked from XUSB
driver since powergating module doesn't internally handle this dependency.

This patch implements this dependency within the powergating module so that
xhci-tegra driver can stay chip-agnostic.

Bug 1451279
Bug 1524744
Bug 200027067

Change-Id: I57da2645c9bde1c98b73a906f2ff5e407a3a8380
Reviewed-on: http://git-master/r/424035
(cherry picked from commit ff373b04f297ee653c58a86c6642325037f5d10e)
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/498661
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

usb: xhci: tegra: remove conditional powergating

The powergate module now maintains reference count for PCIE.  Remove conditional
checks in XHCI driver before invoking powergating APIs.

Bug 1451279
Bug 1455032
Bug 200027067

Change-Id: I186270dc86fba78a8c321ba5923382e642b14b60
Reviewed-on: http://git-master/r/418061
(cherry picked from commit b0f746945fccf025e2ab1764c0cc35eb1bc780b3)
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/498660
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra: power: add reference counters for pcie

Due to HW Bug 1320346, both XUSB and PCIE modules need to control powergating
on PCIE block.  Implement reference counter mechanism so that powergating is
done only when neither of these two drivers are active.

Bug 1451279
Bug 1455032
Bug 200027067

Change-Id: I6866ba0fb47433e211360b722abbb1b2c1a05c35
Reviewed-on: http://git-master/r/418060
(cherry picked from commit 70be55b824632252be36f6ee0d495d4c0f4e507c)
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/498659
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

arm: tegra12: dtb: rearrange pmc registration

PMC should be suspended as soon as interrupt-
controller bus is suspended so that no wake signal
is entertained in between leading to abnormal
system behaviour

Bug 200036432

Change-Id: I4de7462a8c0588f8cecde270a97c39040748a4b6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/498280
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

ARM: tegra: move pinmux dt node before gpio mode

Move the pimx DT node before gpio node to make sure that
pinmux get registered before the gpio.

Bug 200033491

Change-Id: I55d5a5c1a1570c16d8332ba224e0ed9a1f7c257c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/412630
(cherry picked from commit 463019f3158b58906f5b4c81463e5b0b1067576f)
Reviewed-on: http://git-master/r/498813
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

pinctrl: tegra: fix pinconfig_group_set

Prepare config using param parameter to generate the right
value for pinmux register

Bug 200033491

Change-Id: I973cc449e8cf89cb3b6f5b5da1021d21d193b47d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/496827
(cherry picked from commit 418c027e40353a4b99fe7fcfbc0743de7e07d15c)
Reviewed-on: http://git-master/r/498329
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

pinctrl: tegra: set tristate =1 and input =0 for unused pins

Set the tristate bit to 1 and e_input to 0 for unused pins
to set it on low power and avoid conflict with any other pins.

Bug 200033491

Change-Id: If83f6129dbf6c6fe28a7a7c596e5a3858a894914
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/416649
(cherry picked from commit 7e81b36f87cffdc5d473a39735877a1432ac3151)
Reviewed-on: http://git-master/r/498328
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

pinctrl: tegra: configure pins for gpio direction

If pin is configured on gpio mode and set for input direction
then set e_input = 1 and if pin is set for output direction
then set tristate = 0 for that pin.

Bug 200033491

Change-Id: Ibcae17ad8bf4e45f0c74eb68d3bf975078fb67d6
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/416650
(cherry picked from commit 3dbac8e8382be0766e221c3f47f6254538b17030)
Reviewed-on: http://git-master/r/498327
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

gpio: tegra: call pinctrl dirctions apis on direction input/output

Set the pins in different direction based on client request from gpio.
This will help to non-tristate the pin on gpio output mode or enable
input on gpio input mode without any explicit condition.

Bug 200033491

Change-Id: I074451e344bfd8465aceb39c1091809da4f58f58
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit c520a6048a942b5870f560979045c74659c8fe76)
Reviewed-on: http://git-master/r/#/c/415991/
Reviewed-on: http://git-master/r/498326
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

gpio: tegra: Enable pinctrl_request_gpio

Call pinctrl_request_gpio when gpio is requested
by tegra_gpio_request

Bug 200033491

Change-Id: I0e0a129adf51775edaa5887b11188f0ed1776e0e
Signed-off-by: shravanid <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/404352
(cherry picked from commit 7ba0a34569bff25730406a4c54967e4e2c470cbc)
Reviewed-on: http://git-master/r/498325
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

Arm: config: tegra12: Enable interactive governor

The interactive governor provides better performance than
ondemand governor. Enable it to improve the performance.

Bug 1359622

Change-Id: Ibc51285531ce2ef0d20fc668e240ef59db1322b1
Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
(cherry picked from commit 42ad40e52df0423d1622b1aa9835033c1c8ef890)
Reviewed-on: http://git-master/r/#/c/488018/
Reviewed-on: http://git-master/r/488030
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>

arm64: configs: tegra13: enable Tegra Profiler

Enable Tegra Profiler for L4T.

Bug 1540280

Change-Id: I13f22d512c1e42d4ad91c03ed7825a8bdbbf2e93
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/450456
(cherry picked from commit 395d3b5d3fad1ac49b06d3b78004cbfce660c504)
Reviewed-on: http://git-master/r/481969
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

arm: configs: vcm30t124: enable Tegra Profiler

Enable Tegra Profiler for vcm30t124 board.

Bug 1540280

Change-Id: I75263020677b0dd7f210bbdc72a775a05370ef81
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/437635
(cherry picked from commit f0cd768a1d49bcadc0ced238b0ce24272219cd2f)
Reviewed-on: http://git-master/r/481972
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>