]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
arm64: tegra210: fix DT for node xusb_padctl
authorTW Chiu <twchiu@nvidia.com>
Sat, 10 Oct 2015 09:56:54 +0000 (17:56 +0800)
committermobile promotions <svcmobile_promotions@nvidia.com>
Wed, 18 Nov 2015 12:03:28 +0000 (04:03 -0800)
DT node xusb_padctl contains info to initialize PLLE and UPHY PLLs.

If pcie is enabled, xusb_padctl needs the following property copied
from pcie node:
nvidia,lane-map

If sata is enabled, xusb_padctl needs the following property copied
from sata node:
nvidia,enable-sata-port

XUSB uses the following property to assign lanes:
nvidia,lane_owner

To initialize PLLE and UPHY PLLs, xusb_padctl needs to know power
rails below:
avdd_pll_uerefe-supply
hvdd_pex_pll_e-supply
dvdd_pex_pll-supply
hvddio_pex-supply
dvddio_pex-supply
hvdd_sata-supply
dvdd_sata_pll-supply
hvddio_sata-supply
dvddio_sata-supply

Bug 1685150

DEPENDS ON: < None >

Change-Id: I5d3d227883d8c3f2148c9ea218f1312a2b54c20a
Signed-off-by: TW Chiu <twchiu@nvidia.com>
Reviewed-on: http://git-master/r/815639
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

arch/arm64/boot/dts/tegra210-L4T-foster-e-hdd-p2530-0932-e02-00.dts
arch/arm64/boot/dts/tegra210-darcy-hdd-p2892-0030-a00-00.dts
arch/arm64/boot/dts/tegra210-ers-e2220-1180-a00-00.dts
arch/arm64/boot/dts/tegra210-foster-e-hdd-cpc-p2530-0933-e03-00.dts
arch/arm64/boot/dts/tegra210-platforms/tegra210-darcy-pcie.dtsi
arch/arm64/boot/dts/tegra210-vcm31-e2580-common.dtsi

index 145c4b7cb538ae87fb7998521e5cd79ec37c2703..5754dc079a1c41cfa8e206eb06119940367fffa1 100644 (file)
                nvidia,enable-sata-port;
        };
 
+       xusb_padctl {
+               nvidia,enable-sata-port;
+       };
+
        /* this sku has both eSATA and eMMC */
 
        sdhci@700b0600 {
index a631ef297bb94ebcab541954f886fb0eafd35e9d..fe3990e330d6525464031ac29288fa7ace4515b2 100644 (file)
                nvidia,enable-sata-port;
        };
 
+       xusb_padctl {
+               nvidia,enable-sata-port;
+       };
+
        sdhci@700b0600 {
                status="disabled";
        };
index 88b1d1757ea63fd634b2634d9123b23b0f86ecbe..6cbf1edd99912a88f5928d070854b6e21a35f69b 100644 (file)
         };
 
        /* Put common control config here */
-       xusb_pad_ctl: padctl@0 {
+       xusb_pad_ctl: xusb_padctl {
                nvidia,ss_portmap = <0x2130>;
                nvidia,lane_owner = <0xFF56>; /* Use 0xF to disable lane assign */
                nvidia,otg_portmap = <0x0101>;
+               nvidia,lane-map = <0x14>;
+               nvidia,enable-sata-port;
                status = "okay";
        };
 
index 4009be8e9a8fcb69fbc52ae3c01d05255168b98e..36acf776e580dd74acd2877d2635dd2b20080eb6 100644 (file)
                nvidia,enable-sata-port;
        };
 
+       xusb_padctl {
+               nvidia,enable-sata-port;
+       };
+
        sdhci@700b0600 {
                status="disabled";
        };
index 3d9fe5e7d5e8a062556c4dc5a5df42f9c6fa9d28..f570aca3fc1a55e362e2c569b9fcf891ed890182 100644 (file)
@@ -48,4 +48,8 @@
                        status = "okay";
                };
        };
+
+       xusb_padctl {
+               nvidia,lane-map = <0x14>;
+       };
 };
index 4081b5ae7fcce89f8e86fd8de4a0fdf03f0e9450..87d07029e309395d5875eb874d5dc68bb7100d84 100644 (file)
                nvidia,ss_portmap = <0x0277>;
                nvidia,lane_owner = <0x43FF>; /* Use 0xF to disable lane assign */
                nvidia,otg_portmap = <0x0100>;
-               nvidia,lane-map = <0x12>;
-               nvidia,enable-sata-port;
+               /*nvidia,lane-map = <0x12>;*/
+               /*nvidia,enable-sata-port;*/
                status = "okay";
        };