ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
/* setup the command register and set the controller in RUN mode */
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
- ehci->command |= CMD_RUN;
+#ifndef CONFIG_ARCH_TEGRA_2x_SOC
+ /* dont start RS here for HSIC, it will be set by bus_reset */
+ if (tegra->phy->usb_phy_type != TEGRA_USB_PHY_TYPE_HSIC)
+#endif
+ ehci->command |= CMD_RUN;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
/* Enable the root Port Power */
val = readl(base + UHSIC_PADS_CFG1);
val &= ~UHSIC_RPD_STROBE;
-#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+ /* safe to enable RPU on STROBE at all times during idle */
val |= UHSIC_RPU_STROBE;
-#endif
writel(val, base + UHSIC_PADS_CFG1);
+ val = readl(base + USB_USBCMD);
+ val &= ~USB_USBCMD_RS;
+ writel(val, base + USB_USBCMD);
+
if (uhsic_config->usb_phy_ready &&
uhsic_config->usb_phy_ready())
return -EAGAIN;
+
+ /* wait for connect detect */
+ if (utmi_wait_register(base + UHSIC_STAT_CFG0,
+ UHSIC_CONNECT_DETECT, UHSIC_CONNECT_DETECT) < 0) {
+ pr_err("%s: timeout waiting for hsic connect detect\n",
+ __func__);
+ return -ETIMEDOUT;
+ }
+
}
return 0;
}