static struct clk *tegra_pclk;
static struct clk *tegra_clk_m;
static struct tegra_suspend_platform_data *pdata;
-static enum tegra_suspend_mode current_suspend_mode = TEGRA_SUSPEND_NONE;
+enum tegra_suspend_mode current_suspend_mode = TEGRA_SUSPEND_NONE;
#if defined(CONFIG_TEGRA_CLUSTER_CONTROL) && INSTRUMENT_CLUSTER_SWITCH
static unsigned long
#ifndef __MACH_TEGRA_PMC_H
#define __MACH_TEGRA_PMC_H
-enum tegra_suspend_mode {
- TEGRA_SUSPEND_NONE = 0,
- TEGRA_SUSPEND_LP2, /* CPU voltage off */
- TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
- TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
- TEGRA_MAX_SUSPEND_MODE,
-};
+#include <linux/tegra-pm.h>
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) && defined(CONFIG_PM_SLEEP)
void set_power_timers(unsigned long us_on, unsigned long us_off);
* Author:
* Erik Gilling <konkers@google.com>
*
- * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
#include <linux/syscore_ops.h>
#include <linux/tegra-soc.h>
#include <linux/irqchip/tegra.h>
+#include <linux/tegra-pm.h>
#define GPIO_BANK(x) ((x) >> 5)
#define GPIO_PORT(x) (((x) >> 3) & 0x3)
u32 int_lvl[4];
u32 wake_enb[4];
int wake_depth;
+ int wake_lp0_cap[4];
#endif
};
for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
unsigned int gpio = (b<<5) | (p<<3);
+ unsigned int wake_enb;
bank->cnf[p] = tegra_gpio_readl(GPIO_CNF(gpio));
bank->out[p] = tegra_gpio_readl(GPIO_OUT(gpio));
bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio));
bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio));
/* disable gpio interrupts that are not wake sources */
- tegra_gpio_writel(bank->wake_enb[p], GPIO_INT_ENB(gpio));
+ wake_enb = (current_suspend_mode == TEGRA_SUSPEND_LP0) ?
+ (bank->wake_enb[p] & bank->wake_lp0_cap[p]) :
+ bank->wake_enb[p];
+ tegra_gpio_writel(wake_enb, GPIO_INT_ENB(gpio));
}
}
local_irq_restore(flags);
return 0;
}
-static int tegra_update_lp1_gpio_wake(struct irq_data *d, bool enable)
+static int tegra_update_lp1_gpio_wake(struct irq_data *d, bool enable, int wake)
{
#ifdef CONFIG_PM_SLEEP
struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
bank->wake_enb[port_index] |= mask;
else
bank->wake_enb[port_index] &= ~mask;
+
+ /* Enable GPIO interrupt in Lp0 when GPIO is a Lp0 wake up source */
+ if (wake >= 0)
+ bank->wake_lp0_cap[port_index] |= mask;
#endif
return 0;
* update LP1 mask for gpio port/pin interrupt
* LP1 enable independent of LP0 wake support
*/
- ret = tegra_update_lp1_gpio_wake(d, enable);
+ ret = tegra_update_lp1_gpio_wake(d, enable, wake);
if (ret) {
pr_err("Failed gpio lp1 %s for irq=%d, error=%d\n",
(enable ? "enable" : "disable"), d->irq, ret);
/*
* include/linux/tegra-pm.h
*
- * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
#define TEGRA_PM_SUSPEND 0x0001
#define TEGRA_PM_RESUME 0x0002
+enum tegra_suspend_mode {
+ TEGRA_SUSPEND_NONE = 0,
+ TEGRA_SUSPEND_LP2, /* CPU voltage off */
+ TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
+ TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
+ TEGRA_MAX_SUSPEND_MODE,
+};
+
int tegra_register_pm_notifier(struct notifier_block *nb);
int tegra_unregister_pm_notifier(struct notifier_block *nb);
+extern enum tegra_suspend_mode current_suspend_mode;
#endif /* _LINUX_TEGRA_PM_H_ */
if (gpio_is_valid(pdata->gpio_hp_det)) {
tegra_rt5639_hp_jack_gpio.gpio = pdata->gpio_hp_det;
+ tegra_rt5639_hp_jack_gpio.wake = true;
tegra_rt5639_hp_jack_gpio.invert =
!pdata->gpio_hp_det_active_high;
snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE,