2 * Copyright (C) 2012-2014, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __MACH_TEGRA_PMC_H
19 #define __MACH_TEGRA_PMC_H
21 #include <linux/tegra-pm.h>
23 #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) && defined(CONFIG_PM_SLEEP)
24 void set_power_timers(unsigned long us_on, unsigned long us_off);
27 bool tegra_pmc_cpu_is_powered(int cpuid);
28 int tegra_pmc_cpu_power_on(int cpuid);
29 int tegra_pmc_cpu_remove_clamping(int cpuid);
33 u32 cpu_good_time; /* CPU power good time in uS */
34 u32 cpu_off_time; /* CPU power off time in uS */
35 u32 core_osc_time; /* Core power good osc time in uS */
36 u32 core_pmu_time; /* Core power good pmu time in uS */
37 u32 core_off_time; /* Core power off time in uS */
38 bool corereq_high; /* Core power request active-high */
39 bool sysclkreq_high; /* System clock request active-high */
40 bool combined_req; /* Combined pwr req for CPU & Core */
41 bool cpu_pwr_good_en; /* CPU power good signal is enabled */
42 u32 lp0_vec_phy_addr; /* The phy addr of LP0 warm boot code */
43 u32 lp0_vec_size; /* The size of LP0 warm boot code */
44 enum tegra_suspend_mode suspend_mode;
46 struct pmc_pm_data *tegra_get_pm_data(void);