help
Choose this if you have an Intel Pentium M.
+config IA32_CORE2
+ bool "Intel Core 2"
+ depends on IA32
+ help
+ Choose this if you have an Intel Core 2.
+
+config IA32_ATOM
+ bool "Intel Atom"
+ depends on IA32
+ help
+ Choose this if you have an Intel Atom.
+
config IA32_K6
bool "AMD K6 / K6-II / K6-III"
depends on IA32
help
Choose this if you have an AMD Opteron or Athlon64 CPU.
+config IA32_K10
+ bool "AMD Barcelona (K10)"
+ depends on IA32
+ help
+ Choose this if you have an AMD Barcelona based CPU.
+
+
config AMD64_K8
bool "AMD Opteron / Athlon64"
depends on AMD64
help
Choose this if you have an AMD Opteron or Athlon64 CPU.
+config AMD64_CORE2
+ bool "Intel Core 2"
+ depends on AMD64
+ help
+ Choose this if you have an Intel Core 2.
+
+config AMD64_ATOM
+ bool "Intel Atom"
+ depends on AMD64
+ help
+ Choose this if you have an Intel Atom.
+
+config AMD64_K10
+ bool "AMD Barcelona (K10)"
+ depends on AMD64
+ help
+ Choose this if you have an AMD Barcelona based CPU.
+
+
config PPC32_603e
bool "PowerPC 603e"
depends on PPC32
-config SVM
- bool "Enable SVM support"
+config CPU_VIRT
+ bool "Enable CPU virtualization (SVM and VT)"
depends on PF_PC
help
- Support SVM virtualization extension that comes with AMD CPUs,
- including nested paging (NPT). This feature allows you to run a
- virtual machine monitor (VMM) on top of Fiasco.
+ Support virtualization extensions that comes with x86 CPUs,
+ including nested paging. This feature allows you to run a virtual
+ machine monitor (VMM) on top of Fiasco.
config ARM_ALIGNMENT_CHECK
bool "Enable alignment check"
default "ux" if PF_UX
default "amd64" if AMD64 && PF_PC
default "ia32" if IA32 && PF_PC
- default "ppc32" if PPC32
+ default "ppc32" if PPC32
config IA32_TARGET
string
default "Pentium M" if IA32_PM
default "AMD K6" if IA32_K6
default "AMD Athlon" if IA32_K7
- default "AMD Opteron" if IA32_K8 || AMD64_K8
+ default "Intel Core2" if IA32_CORE2 || AMD64_CORE2
+ default "Intel Atom" if IA32_ATOM || AMD64_ATOM
+ default "AMD Opteron" if IA32_K8 || AMD64_K8 || AMD64_K10 || IA32_K10
config ABI
string
OPT_CFLAGS += -mno-red-zone -funit-at-a-time
OPT_CXXFLAGS += -mno-red-zone -funit-at-a-time
-SHARED_FLAGS-$(CONFIG_AMD64_K8) += $(call CHECKCC,-march=k8,-march=i686)
-SHARED_FLAGS += $(call CHECKCC,-mno-mmx,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse2,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse3,)
-SHARED_FLAGS += $(call CHECKCC,-mno-3dnow,)
+SHARED_FLAGS-$(CONFIG_AMD64_CORE2) += $(call CHECKCC,-march=core2,-march=i686)
+SHARED_FLAGS-$(CONFIG_AMD64_ATOM) += $(call CHECKCC,-march=atom,-march=i686)
+SHARED_FLAGS-$(CONFIG_AMD64_K8) += $(call CHECKCC,-march=k8,-march=i686)
+SHARED_FLAGS += $(call CHECKCC,-mno-mmx,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse2,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse3,)
+SHARED_FLAGS += $(call CHECKCC,-mno-3dnow,)
ASFLAGS += -m64 -mcmodel=kernel
OFORMAT := elf64-x86-64
NOOPT_SHARED_FLAGS += $(call CHECKCC,--param max-inline-insns-single=50)
SHARED_FLAGS += -mpreferred-stack-boundary=2 -m32
-SHARED_FLAGS-$(CONFIG_REGPARM3) += -mregparm=3
-SHARED_FLAGS-$(CONFIG_IA32_486) += -march=i486
-SHARED_FLAGS-$(CONFIG_IA32_586) += -march=i586
-SHARED_FLAGS-$(CONFIG_IA32_686) += -march=i686
-SHARED_FLAGS-$(CONFIG_IA32_P2) += -march=i686 $(call CHECKCC,-mtune=pentium2,\
- $(call CHECKCC,-mcpu=pentium2))
-SHARED_FLAGS-$(CONFIG_IA32_P3) += -march=i686 $(call CHECKCC,-mtune=pentium3,\
- $(call CHECKCC,-mcpu=pentium3))
-SHARED_FLAGS-$(CONFIG_IA32_P4) += -march=i686 $(call CHECKCC,-mtune=pentium4,\
- $(call CHECKCC,-mcpu=pentium4))
-SHARED_FLAGS-$(CONFIG_IA32_PM) += -march=i686 $(call CHECKCC,-mtune=pentium-m,\
- $(call CHECKCC,-mcpu=pentiumm))
-SHARED_FLAGS-$(CONFIG_IA32_K6) += $(call CHECKCC,-march=k6,-march=i586)
-SHARED_FLAGS-$(CONFIG_IA32_K7) += $(call CHECKCC,-march=athlon,-march=i686)
-SHARED_FLAGS-$(CONFIG_IA32_K8) += $(call CHECKCC,-march=k8,-march=i686)
+SHARED_FLAGS-$(CONFIG_REGPARM3) += -mregparm=3
+SHARED_FLAGS-$(CONFIG_IA32_486) += -march=i486
+SHARED_FLAGS-$(CONFIG_IA32_586) += -march=i586
+SHARED_FLAGS-$(CONFIG_IA32_686) += -march=i686
+SHARED_FLAGS-$(CONFIG_IA32_P2) += -march=i686 $(call CHECKCC,-mtune=pentium2,\
+ $(call CHECKCC,-mcpu=pentium2))
+SHARED_FLAGS-$(CONFIG_IA32_P3) += -march=i686 $(call CHECKCC,-mtune=pentium3,\
+ $(call CHECKCC,-mcpu=pentium3))
+SHARED_FLAGS-$(CONFIG_IA32_P4) += -march=i686 $(call CHECKCC,-mtune=pentium4,\
+ $(call CHECKCC,-mcpu=pentium4))
+SHARED_FLAGS-$(CONFIG_IA32_PM) += -march=i686 $(call CHECKCC,-mtune=pentium-m,\
+ $(call CHECKCC,-mcpu=pentiumm))
+SHARED_FLAGS-$(CONFIG_IA32_CORE2) += $(call CHECKCC,-march=core2,-march=i686)
+SHARED_FLAGS-$(CONFIG_IA32_ATOM) += $(call CHECKCC,-march=atom,-march=i686)
+SHARED_FLAGS-$(CONFIG_IA32_K6) += $(call CHECKCC,-march=k6,-march=i586)
+SHARED_FLAGS-$(CONFIG_IA32_K7) += $(call CHECKCC,-march=athlon,-march=i686)
+SHARED_FLAGS-$(CONFIG_IA32_K8) += $(call CHECKCC,-march=k8,-march=i686)
+SHARED_FLAGS-$(CONFIG_IA32_K10) += $(call CHECKCC,-march=barcelona,-march=i686)
-SHARED_FLAGS += $(call CHECKCC,-mno-mmx,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse2,)
-SHARED_FLAGS += $(call CHECKCC,-mno-sse3,)
-SHARED_FLAGS += $(call CHECKCC,-mno-3dnow,)
+SHARED_FLAGS += $(call CHECKCC,-mno-mmx,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse2,)
+SHARED_FLAGS += $(call CHECKCC,-mno-sse3,)
+SHARED_FLAGS += $(call CHECKCC,-mno-3dnow,)
-ASFLAGS += -m32
-OFORMAT := elf32-i386
-LD_EMULATION-SYSTEM-FreeBSD := elf_i386_fbsd
-LD_EMULATION-SYSTEM-default := elf_i386
+ASFLAGS += -m32
+OFORMAT := elf32-i386
+LD_EMULATION-SYSTEM-FreeBSD := elf_i386_fbsd
+LD_EMULATION-SYSTEM-default := elf_i386
#
# Makefile.sub2: Create everything else.
#
-all doc $(addsuffix .ps,$(DEPS_FILES)) $(addsuffix .svg,$(DEPS_FILES)) TAGS tags %.o %_t: \
+all doc $(addsuffix .ps,$(DEPS_FILES)) $(addsuffix .svg,$(DEPS_FILES)) TAGS tags: \
$(MODULES_FILES) .Modules.deps create-sources globalconfig.h
$(MAKE) srcdir=$(srcdir) objbase=$(objbase) -f $(srcdir)/Makefile.sub2 $@
+%.o %_t: $(MODULES_FILES) .Modules.deps create-sources globalconfig.h
+ $(MAKE) srcdir=$(srcdir) objbase=$(objbase) -f $(srcdir)/Makefile.sub2 $@
+
# Divert any target we do not explicitly mention in this Makefile to
# Makefile.sub2. (Unfortunately 1, this does not work for file
# targets that already exist in this directory. Unfortunately 2,
$(CONFIG_XARCH) apic abs-timeout-hack \
i8259 pc i8254 fpu \
auto_map_kip
+
OBJ_SPACE-y = phys
OBJ_SPACE- = virt
OBJ_SPACE = $(OBJ_SPACE-$(CONFIG_DISABLE_VIRT_OBJ_SPACE))
PREPROCESS_PARTS-$(CONFIG_WATCHDOG) += watchdog
PREPROCESS_PARTS-$(CONFIG_PERF_CNT) += perf_cnt
PREPROCESS_PARTS-$(CONFIG_IO_PROT) += io
-PREPROCESS_PARTS-$(CONFIG_SVM) += svm
+PREPROCESS_PARTS-$(CONFIG_CPU_VIRT) += svm
PREPROCESS_PARTS-$(CONFIG_SCHED_FIXED_PRIO) += sched_fixed_prio
PREPROCESS_PARTS-$(CONFIG_SCHED_WFQ) += sched_wfq
PREPROCESS_PARTS-$(CONFIG_SCHED_FP_WFQ) += sched_fp_wfq
PREPROCESS_PARTS += $(PREPROCESS_PARTS-y)
-
#
# TYPES subsystem
#
#
# ABI Subsystem
#
-PRIVATE_INCDIR += abi
ABI := libabi.a
VPATH += abi/$(CONFIG_XARCH) abi
INTERFACES_ABI := l4_fpage l4_msg_item l4_buf_desc kip l4_types \
keyb_IMPL := keyb keyb-pc
io_IMPL := io io-amd64
-processor_IMPL := processor processor-amd64
mem_IMPL := mem mem-amd64
+processor_IMPL := processor processor-amd64
#
# KERNEL subsystem
#
KERNEL := fiasco.image
VPATH += kern/$(CONFIG_XARCH) kern/shared kern/ia32/64 kern/ia32 kern
-VPATH += jdb/ia32/64 jdb/ia32 jdb
PRIVATE_INCDIR += kern/$(CONFIG_XARCH) kern/shared kern/ia32/64 kern/ia32 kern
-INTERFACES_KERNEL := startup boot_info cmdline __main mapping mappable \
- mapping_tree mapdb region pic \
- queue_item queue l4_buf_iter cpu_mask rcupdate \
- bitmap acpi io_apic spin_lock mem_region mem_space \
- mem_space_sigma0 space factory lock irq_pin \
- obj_space ptab_base vlog pages kobject_mapdb \
+INTERFACES_KERNEL := cpu_mask rcupdate pages kobject_mapdb \
+ mem_region per_cpu_data startup boot_info cmdline \
+ __main queue queue_item l4_buf_iter irq_pin \
+ bitmap acpi io_apic mapping spin_lock \
+ mapping_tree mappable dbg_page_info \
+ mapdb region pic dirq_pic_pin dirq_io_apic \
+ kobject_dbg kobject ready_queue_wfq ready_queue_fp \
+ obj_space ptab_base io_space_sigma0 irq_msi \
+ io_space ram_quota ref_ptr ref_obj \
+ mem_space mem_space_sigma0 space vlog \
kmem kmem_alloc slab_cache_anon mem_layout \
kmem_slab_simple kmem_slab switch_lock kip_init \
thread_lock helping_lock cpu_lock timer timeout \
- ipc_timeout timeslice_timeout ipc_sender \
- thread_state context mp_lock sender receiver \
- mem_unit kobject_dbg kobject ref_obj ref_ptr vcpu \
- thread kobject_helper icu_helper \
- syscalls kernel_thread map_util irq banner \
- warn per_cpu_data per_cpu_data_alloc \
+ ipc_timeout timeslice_timeout \
+ per_cpu_data_alloc vcpu kobject_helper icu_helper \
+ thread_state context mp_lock sender receiver \
+ mem_unit factory lock ipc_sender \
+ thread syscalls kernel_thread map_util irq banner \
+ warn app_cpu_thread \
dirq globals apic watchdog kernel_uart pit \
- dirq_pic_pin dirq_io_apic irq_msi irq_controller \
checksum main config mapped_alloc \
vmem_alloc paging fpu fpu_state fpu_alloc cpu \
entry_frame kernel_console boot_console profile \
- ipc_gate task irq_chip terminate \
- sched_context utcb_init continuation \
- perf_cnt x86desc gdt idt tss trap_state \
- buddy_alloc vkey kdb_ke kernel_task dbg_page_info \
- io_space io_space_sigma0 ram_quota scheduler \
- prio_list app_cpu_thread ipi timer_irq \
- clock svm vm ready_queue_wfq ready_queue_fp
+ ipc_gate task kernel_task irq_controller \
+ irq_chip terminate continuation \
+ sched_context utcb_init \
+ perf_cnt x86desc gdt idt tss trap_state \
+ buddy_alloc vkey kdb_ke prio_list ipi timer_irq \
+ scheduler clock vm_factory \
+
+
+INTERFACES_KERNEL-$(CONFIG_CPU_VIRT) += svm vm vm_svm
PREPROCESS_PARTS += ulock
INTERFACES_KERNEL += u_semaphore
kip_init_IMPL := kip_init-ia32
kmem_IMPL := kmem-ia32 kmem-ia32-64
kmem_alloc_IMPL := kmem_alloc kmem_alloc-ia32
-
main_IMPL := main-ia32-64 main-ia32
mapping_IMPL := mapping-ia32-64 mapping
map_util_IMPL := map_util map_util-mem map_util-io map_util-objs
tss_IMPL := tss-amd64
utcb_init_IMPL := utcb_init utcb_init-ia32
vmem_alloc_IMPL := vmem_alloc vmem_alloc-ia32
-vm_IMPL := vm-svm
+vm_factory_IMPL := vm_factory vm_factory-ia32
watchdog_IMPL := watchdog watchdog-ia32
-ifeq ("$(CONFIG_SERIAL)","y")
- INTERFACES_KERNEL += uart_console
-endif
+INTERFACES_KERNEL-$(CONFIG_SERIAL) += uart_console
ifeq ("$(CONFIG_PROFILE)","y")
cpu_lock_IMPL := cpu_lock cpu_lock-pic
endif
ifeq ("$(CONFIG_JDB)","y")
-INTERFACES_KERNEL += jdb_entry_frame jdb jdb_prompt_ext jdb_symbol \
- jdb_dbinfo jdb_bp jdb_thread_list jdb_lines \
+VPATH += jdb/ia32/64 jdb/ia32 jdb
+INTERFACES_KERNEL += jdb jdb_util jdb_prompt_ext jdb_symbol jdb_lines \
+ jdb_dbinfo jdb_bp \
jdb_tbuf jdb_module jdb_core jdb_io_ports \
jdb_kern_info jdb_prompt_module jdb_tbuf_output \
jdb_input jdb_dump jdb_ptab jdb_misc jdb_mapdb \
jdb_tcb jdb_attach_irq jdb_tbuf_init jdb_trace \
jdb_trace_set jdb_counters jdb_table kern_cnt \
- jdb_bt tb_entry tb_entry_output jdb_exit_module \
+ tb_entry tb_entry_output jdb_exit_module \
jdb_tbuf_show jdb_console_buffer virq \
jdb_list jdb_screen push_console jdb_timeout \
jdb_handler_queue jdb_halt_thread \
jdb_kern_info_kmem_alloc jdb_kern_info_region \
jdb_kern_info_kip jdb_kern_info_config \
- loadcnt jdb_util jdb_space \
- jdb_kobject jdb_kobject_names jdb_ipc_gate \
- jdb_obj_space jdb_log jdb_factory jdb_semaphore \
- jdb_io_apic jdb_trap_state jdb_ipi jdb_rcupdate \
+ loadcnt jdb_utcb jdb_thread_list \
+ jdb_entry_frame jdb_kobject jdb_space jdb_io_apic \
+ jdb_trap_state jdb_ipi jdb_kobject_names \
+ jdb_rcupdate jdb_bt jdb_ipc_gate jdb_obj_space \
+ jdb_log jdb_factory jdb_semaphore jdb_iomap \
jdb_thread jdb_scheduler jdb_sender_list \
- jdb_disasm jdb_regex
+ jdb_regex jdb_disasm
apic_IMPL += apic-debug
jdb_IMPL := jdb jdb-ia32-amd64 jdb-ansi jdb-ia32-ux jdb-thread \
jdb-int3-ia32-amd64 jdb-int3-ia32-ux
jdb_bp_IMPL := jdb_bp-ia32-ux jdb_bp-ia32-amd64 jdb_bp-amd64
jdb_bt_IMPL := jdb_bt-ia32-ux
+jdb_entry_frame_IMPL := jdb_entry_frame-ia32
jdb_kern_info_IMPL := jdb_kern_info jdb_kern_info-ia32-amd64 \
jdb_kern_info-ia32-ux jdb_kern_info-apic \
- jdb_kern_info-pci \
- jdb_kern_info-bench \
- jdb_kern_info-bench-ia32-64 jdb_kern_info-dr
+ jdb_kern_info-pci jdb_kern_info-bench \
+ jdb_kern_info-bench-ia32-64 \
+ jdb_kern_info-dr
jdb_misc_IMPL := jdb_misc-ia32-amd64
-jdb_screen_IMPL := jdb_screen jdb_screen-ia32
jdb_ptab_IMPL := jdb_ptab jdb_ptab-amd64
+jdb_screen_IMPL := jdb_screen jdb_screen-ia32
jdb_tcb_IMPL := jdb_tcb jdb_tcb-amd64
-jdb_entry_frame_IMPL := jdb_entry_frame-ia32
jdb_trace_set_IMPL := jdb_trace_set jdb_trace_set-ia32-ux
-#jdb_utcb_IMPL := jdb_utcb-ia32-ux
-# ifeq ("$(CONFIG_JDB_MISC)","y")
- INTERFACES_KERNEL += jdb_tetris
-# endif
+INTERFACES_KERNEL-$(CONFIG_JDB_MISC) += jdb_tetris
endif
CXXSRC_KERNEL := kernel_panic.cc libc_backend_lock.cc
ASSRC_KERNEL := entry.S entry-native.S shortcut.S
-ifeq ($(CONFIG_KIP_SYSCALLS_ABS),y)
- ASSRC_KERNEL += sys_call_page-asm.S
-endif
-
-ifeq ($(CONFIG_MP),y)
- ASSRC_KERNEL += tramp-mp.S entry-mp.S
-endif
+ASSRC_KERNEL-$(CONFIG_KIP_SYSCALLS_ABS) += sys_call_page-asm.S
+ASSRC_KERNEL-$(CONFIG_MP) += tramp-mp.S entry-mp.S
+ASSRC_KERNEL-$(CONFIG_CPU_VIRT) += vm_svm_asm.S
+ASSRC_KERNEL += $(ASSRC_KERNEL-y)
NOOPT += $(filter jdb%,\
$(foreach in,$(INTERFACES_KERNEL), \
#
ifneq ($(CONFIG_JDB_GZIP),)
LIBGZIP := libgzip.a
- VPATH += lib/gzip
+ VPATH += lib/gzip
PRIVATE_INCDIR += lib/gzip
- CSRC_LIBGZIP := adler32.c crc32.c gzip.c trees.c deflate.c zutil.c
- NOOPT += $(patsubst %.o, %, $(OBJ_LIBGZIP))
+ CSRC_LIBGZIP := adler32.c crc32.c gzip.c trees.c deflate.c zutil.c
+ NOOPT += $(patsubst %.o, %, $(OBJ_LIBGZIP))
endif
#
lib/disasm/libiberty lib/disasm/bfd
PRIVATE_INCDIR += lib/disasm
CSRC_LIBDISASM := disasm.c dis-init.c i386-dis.c dis-buf.c
- NOOPT += $(patsubst %.o, %, $(OBJ_LIBDISASM))
+ NOOPT += $(patsubst %.o, %, $(OBJ_LIBDISASM))
endif
#
endif
MODULES_FILES = $(MODULES_FILE) $(MODULES_FILE_BSP)
+
+INTERFACES_KERNEL += $(INTERFACES_KERNEL-y)
OBJ_SPACE = $(OBJ_SPACE-$(CONFIG_DISABLE_VIRT_OBJ_SPACE))
PREPROCESS_PARTS += obj_space_$(OBJ_SPACE)
+
PREPROCESS_PARTS-$(CONFIG_MP) += mp
PREPROCESS_PARTS-$(CONFIG_LIST_ALLOC_SANITY) += list_alloc_debug
PREPROCESS_PARTS-$(CONFIG_JDB) += debug log
PREPROCESS_PARTS-$(CONFIG_HANDLE_SEGMENTS) += segments
PREPROCESS_PARTS-$(CONFIG_IO_PROT) += io
PREPROCESS_PARTS-$(CONFIG_IO_PROT_IOPL_3) += iopl3
-PREPROCESS_PARTS-$(CONFIG_SVM) += svm
+PREPROCESS_PARTS-$(CONFIG_CPU_VIRT) += svm
PREPROCESS_PARTS-$(CONFIG_SCHED_FIXED_PRIO) += sched_fixed_prio
PREPROCESS_PARTS-$(CONFIG_SCHED_WFQ) += sched_wfq
PREPROCESS_PARTS-$(CONFIG_SCHED_FP_WFQ) += sched_fp_wfq
mapdb region pic dirq_pic_pin dirq_io_apic \
kobject_dbg kobject ready_queue_wfq ready_queue_fp \
obj_space ptab_base io_space_sigma0 irq_msi \
- io_space ram_quota ref_ptr ref_obj \
- mem_space mem_space_sigma0 space vlog \
+ io_space ram_quota ref_ptr ref_obj \
+ mem_space mem_space_sigma0 space vlog \
kmem kmem_alloc slab_cache_anon mem_layout \
kmem_slab_simple kmem_slab switch_lock kip_init \
thread_lock helping_lock cpu_lock timer timeout \
vmem_alloc paging fpu fpu_state fpu_alloc cpu \
entry_frame kernel_console boot_console profile \
ipc_gate task kernel_task irq_controller \
- irq_chip terminate continuation \
- sched_context utcb_init sys_call_page \
- perf_cnt x86desc gdt idt tss trap_state \
+ irq_chip terminate continuation \
+ sched_context utcb_init \
+ perf_cnt x86desc gdt idt tss trap_state \
buddy_alloc vkey kdb_ke prio_list ipi timer_irq \
- scheduler clock svm vm
+ scheduler clock vm_factory \
+ sys_call_page
+
+INTERFACES_KERNEL-$(CONFIG_CPU_VIRT) += svm vm vm_svm
+PREPROCESS_PARTS += ulock
+INTERFACES_KERNEL += u_semaphore
-#ifeq ("$(CONFIG_USER_LOCKS)","y")
- PREPROCESS_PARTS += ulock
- INTERFACES_KERNEL += u_semaphore
-#endif
apic_IMPL := apic-ia32 apic-ia32-mp
boot_console_IMPL := boot_console-ia32-amd64
boot_info_IMPL := boot_info boot_info-ia32
+clock_IMPL := clock clock-ia32
config_IMPL := config config-ia32-32 config-ia32
context_IMPL := context context-ia32 context-ia32-32 context-vcpu
continuation_IMPL := continuation-ia32-32
-clock_IMPL := clock clock-ia32
cpu_IMPL := cpu cpu-ia32 cpu-32
dirq_IMPL := dirq dirq-ia32-ux
dirq_pic_pin_IMPL := dirq_pic_pin dirq_pic_pin-ia32-ux
entry_frame_IMPL := entry_frame entry_frame-ia32-ux \
entry_frame-abs-timeout-hack
fpu_IMPL := fpu fpu-ia32-ux fpu-ia32
-ioapic_IMPL := ioapic-ia32
ipi_IMPL := ipi ipi-ia32
kdb_ke_IMPL := kdb_ke kdb_ke-ia32
kernel_thread_IMPL := kernel_thread kernel_thread-std kernel_thread-ia32
kmem_alloc_IMPL := kmem_alloc kmem_alloc-ia32
main_IMPL := main-ia32-32 main-ia32
mapping_IMPL := mapping-ia32-32 mapping
-mapdb_IMPL := mapdb
map_util_IMPL := map_util map_util-mem map_util-io map_util-objs
mem_layout_IMPL := mem_layout mem_layout-ia32-32 mem_layout-ia32
mem_space_IMPL := mem_space mem_space-user mem_space-ia32
timer_IMPL := timer timer-ia32-amd64-ux
thread_IMPL := thread thread-ia32 thread-ia32-32 \
thread-ipc \
- thread-list \
+ thread-list \
thread-pagefault thread-log \
thread-debug thread-dbf thread-ulock thread-vcpu
utcb_init_IMPL := utcb_init utcb_init-ia32
vmem_alloc_IMPL := vmem_alloc vmem_alloc-ia32
-vm_IMPL := vm-svm
+vm_factory_IMPL := vm_factory vm_factory-ia32
watchdog_IMPL := watchdog watchdog-ia32
-ifeq ("$(CONFIG_SERIAL)","y")
- INTERFACES_KERNEL += uart_console
-endif
+INTERFACES_KERNEL-$(CONFIG_SERIAL) += uart_console
ifeq ("$(CONFIG_PROFILE)","y")
cpu_lock_IMPL := cpu_lock cpu_lock-pic
jdb_tcb_IMPL := jdb_tcb jdb_tcb-ia32-ux
jdb_trace_set_IMPL := jdb_trace_set jdb_trace_set-ia32-ux
- ifeq ("$(CONFIG_JDB_MISC)","y")
- INTERFACES_KERNEL += jdb_tetris
- endif
+INTERFACES_KERNEL-$(CONFIG_JDB_MISC) += jdb_tetris
endif
CXXSRC_KERNEL := kernel_panic.cc libc_backend_lock.cc
-ASSRC_KERNEL := entry.S entry-native.S \
- sys_call_page-asm.S
-ifeq ($(CONFIG_MP),y)
-ASSRC_KERNEL += tramp-mp.S entry-mp.S
-endif
+ASSRC_KERNEL := entry.S entry-native.S sys_call_page-asm.S
+ASSRC_KERNEL-$(CONFIG_MP) += tramp-mp.S entry-mp.S
+ASSRC_KERNEL-$(CONFIG_CPU_VIRT) += vm_svm_asm.S
+ASSRC_KERNEL += $(ASSRC_KERNEL-y)
NOOPT += $(filter jdb%,\
$(foreach in,$(INTERFACES_KERNEL), \
endif
MODULES_FILES = $(MODULES_FILE) $(MODULES_FILE_BSP)
+
+INTERFACES_KERNEL += $(INTERFACES_KERNEL-y)
-INTERFACE:
+INTERFACE [svm]:
#include "l4_types.h"
for (unsigned c = 1; c < Config::Max_num_cpus; ++c)
{
if (Cpu::online(c) && !running.cpu(c))
- Ipi::send(c, Ipi::Debug);
+ Ipi::cpu(c).send(Ipi::Debug);
}
Mem::barrier();
retry:
// Huh, not CPU 0, so notify CPU 0 to enter JDB too
// The notification is ignored if CPU 0 is already within JDB
jdb_active = true;
- Ipi::send(0, Ipi::Debug);
+ Ipi::cpu(0).send(Ipi::Debug);
unsigned long wait_count = Max_wait_cnt;
while (!running.cpu(0) && wait_count)
_remote_work_ipi_func_data = data;
_remote_work_ipi_done = 0;
- Ipi::send(to_cpu, Ipi::Debug);
+ Ipi::cpu(to_cpu).send(Ipi::Debug);
if (wait)
while (!*(volatile unsigned long *)&_remote_work_ipi_done)
void
Jdb_ipi_module::print_info(unsigned cpu)
{
+ Ipi &ipi = Ipi::cpu(cpu);
printf("CPU%02u sent/rcvd: %ld/%ld\n",
- cpu, Ipi::_stat_sent.cpu(cpu), Ipi::_stat_received.cpu(cpu));
+ cpu, ipi._stat_sent, ipi._stat_received);
}
PUBLIC
signal (SIGIO, SIG_IGN); // Ignore hardware interrupts
}
+PROTECTED static inline
+void
+Jdb::monitor_address(unsigned, void *)
+{}
IMPLEMENT inline
bool
if (Pic::is_pending(irqs, Config::Scheduling_irq))
{
- Irq::log_irq(0, Config::Scheduling_irq);
+ Irq::log_timer_irq(Config::Scheduling_irq);
Timer::acknowledge();
Timer::update_system_clock();
current_thread()->handle_timer_interrupt();
if (Pic::is_pending(irq, Config::Scheduling_irq))
{
- Irq::log_irq(0, irq);
+ Irq::log_timer_irq(irq);
Timer::acknowledge();
Timer::update_system_clock();
current_thread()->handle_timer_interrupt();
EXTENSION class Ipi
{
+private:
+ Unsigned32 _phys_id;
+
public:
enum Message {
Ipi_start = 1,
#include "cpu.h"
#include "gic.h"
+#include "processor.h"
+
+PUBLIC inline
+Ipi::Ipi() : _phys_id(~0)
+{}
+
+IMPLEMENT inline NEEDS["processor.h"]
+void
+Ipi::init()
+{
+ _phys_id = Proc::cpu_id();
+}
PUBLIC static
void Ipi::ipi_call_debug_arch()
{
}
-PUBLIC static inline NEEDS["gic.h"]
+PUBLIC static inline
void Ipi::eoi(Message)
{
// with the ARM-GIC we have to do the EOI right after the ACK
stat_received();
}
-PUBLIC static
-void Ipi::send(int logical_cpu, Message m)
+PUBLIC inline NEEDS["gic.h"]
+void Ipi::send(Message m)
{
- Gic_pin::_gic[0].softint_cpu(1 << Cpu::cpus.cpu(logical_cpu).phys_id(), m);
- stat_sent(logical_cpu);
+ Gic_pin::_gic[0].softint_cpu(1 << _phys_id, m);
+ stat_sent();
}
PUBLIC static inline
Utcb_init::init_ap(cpu);
Pic::init_ap();
+ Ipi::cpu(_cpu).init();
Timer::init();
Perf_cnt::init_ap();
#include "config.h"
#include "cpu.h"
#include "fpu.h"
+#include "ipi.h"
#include "kern_lib_page.h"
#include "kernel_task.h"
#include "kip_init.h"
// The first 4MB of phys memory are always mapped to Map_base
Mem_layout::add_pmem(Mem_layout::Sdram_phys_base, Mem_layout::Map_base,
- 4<<20);
+ 4 << 20);
Kip_init::init();
Kmem_alloc::init();
Cpu::init_mmu();
Cpu::cpus.cpu(0).init(true);
Fpu::init(0);
+ Ipi::cpu(0).init();
Timer::init();
Kern_lib_page::init();
Utcb_init::init();
_glbl_drq_q.cpu(cpu).enq(&_drq);
- Ipi::send(cpu, Ipi::Global_request);
+ Ipi::cpu(cpu).send(Ipi::Global_request);
//LOG_MSG_3VAL(src, "<drq", src->state(), Mword(this), 0);
while (wait && (state() & Thread_drq_wait))
if (ipi)
{
//LOG_MSG_3VAL(this, "sipi", current_cpu(), cpu(), (Mword)current());
- Ipi::send(cpu, Ipi::Request);
+ Ipi::cpu(cpu).send(Ipi::Request);
}
}
else
//----------------------------------------------------------------------------
IMPLEMENTATION [svm]:
-#include "vm.h"
+#include "vm_factory.h"
PRIVATE inline NOEXPORT
Kobject_iface *
Factory::new_vm(Utcb const *)
{
- Vm *new_t = Vm::create(this);
+ Vm *new_t = Vm_factory::create(this);
if (!new_t)
return 0;
pusha
jmp slowtraps
-
-#ifdef CONFIG_SVM
-/**
- * Function resume_vm, arguments:
- * - eax: physical VMCB address
- * - edx: Pointer to registers (layout specific...)
- *
- * Note: To be called with interrupts disabled!
- */
-
- .p2align(4)
- .globl resume_vm
-resume_vm:
-
- // save callee saved regs
- pushl %edi
- pushl %esi
- pushl %ebx
- pushl %ebp
-
- pushl %edx // store pointer to register struct
-
- clgi // super CLI
-
- sti
- nop
-
- movl 4(%edx), %ecx // restore guest GP registers
- movl 8(%edx), %ebx
- movl 12(%edx), %ebp
- movl 16(%edx), %esi
- movl 20(%edx), %edi
- movl (%edx), %edx
-
- // TODO: Debugregs etc.
-
- // eax used as implicit operand for vm* instructions
- vmload
- vmrun
- vmsave
-
- pushl %edx
- movl 4(%esp), %edx // get previously saved register struct pointer
-
- movl %ecx, 4(%edx) // save guest GP registers
- movl %ebx, 8(%edx)
- movl %ebp, 12(%edx)
- movl %esi, 16(%edx)
- movl %edi, 20(%edx)
-
- movl (%esp), %ecx // guest EDX to ECX
- movl %ecx, (%edx) // EDX has offset 0 in structure
-
- // TODO: restore task register, clear busy flag
-
- cli
- nop
- stgi
-
- addl $8, %esp // adjust stack after two pushs
-
- // restore callee saved registers
- popl %ebp
- popl %ebx
- popl %esi
- popl %edi
-
- ret
-#endif
-
.bss
.space 4096
.global dbf_stack_top
--- /dev/null
+/**
+ * Function resume_vm_svm, arguments:
+ * - eax: physical VMCB address
+ * - edx: Pointer to registers (layout specific...)
+ *
+ * Note: To be called with interrupts disabled!
+ */
+
+ .p2align(4)
+ .globl resume_vm_svm
+resume_vm_svm:
+
+ // save callee saved regs
+ pushl %edi
+ pushl %esi
+ pushl %ebx
+ pushl %ebp
+
+ pushl %edx // store pointer to register struct
+
+ clgi // super CLI
+
+ sti
+ nop
+
+ movl 4(%edx), %ecx // restore guest GP registers
+ movl 8(%edx), %ebx
+ movl 12(%edx), %ebp
+ movl 16(%edx), %esi
+ movl 20(%edx), %edi
+ movl (%edx), %edx
+
+ // TODO: Debugregs etc.
+
+ // eax used as implicit operand for vm* instructions
+ vmload
+ vmrun
+ vmsave
+
+ pushl %edx
+ movl 4(%esp), %edx // get previously saved register struct pointer
+
+ movl %ecx, 4(%edx) // save guest GP registers
+ movl %ebx, 8(%edx)
+ movl %ebp, 12(%edx)
+ movl %esi, 16(%edx)
+ movl %edi, 20(%edx)
+
+ movl (%esp), %ecx // guest EDX to ECX
+ movl %ecx, (%edx) // EDX has offset 0 in structure
+
+ // TODO: restore task register, clear busy flag
+
+ cli
+ nop
+ stgi
+
+ addl $8, %esp // adjust stack after two pushs
+
+ // restore callee saved registers
+ popl %ebp
+ popl %ebx
+ popl %esi
+ popl %edi
+
+ ret
orq $EFLAGS_IF, 8(%rsp)
iretq
-#ifdef CONFIG_SVM
- .p2align(4)
- .globl resume_vm
-resume_vm:
-
- // save callee saved regs
- push %rbx
- push %r12
- push %r13
- push %r14
- push %r15
- push %rbp
-
- mov %rdi, %rax // first arg goes to rax for vm*
- push %rsi // store pointer to register struct
-
- clgi
-
- sti
- nop
-
- // restore guest GP regs
- mov 8(%rsi), %rdx
- mov 16(%rsi), %rcx
- mov 24(%rsi), %rdi
- mov 32(%rsi), %r8
- mov 40(%rsi), %r9
- mov 48(%rsi), %rbx
- mov 56(%rsi), %rbp
- mov 64(%rsi), %r10
- mov 72(%rsi), %r11
- mov 80(%rsi), %r12
- mov 88(%rsi), %r13
- mov 96(%rsi), %r14
- mov 104(%rsi), %r15
- mov (%rsi), %rsi
-
- // TODO: Debugregs
-
- // rax used as implicit operand for vm* instructions
- vmload
- vmrun
- vmsave
-
- push %rsi
- mov 8(%rsp), %rsi // get previously saved register struct pointer
-
- mov %rdx, 8(%rsi) // save guest GP registers
- mov %rcx, 16(%rsi)
- mov %rdi, 24(%rsi)
- mov %r8, 32(%rsi)
- mov %r9, 40(%rsi)
- mov %rbx, 48(%rsi)
- mov %rbp, 56(%rsi)
- mov %r10, 64(%rsi)
- mov %r11, 72(%rsi)
- mov %r12, 80(%rsi)
- mov %r13, 88(%rsi)
- mov %r14, 96(%rsi)
- mov %r15, 104(%rsi)
-
- mov (%rsp), %rdx // guest rsi to rdx
- mov %rdx, (%rsi) // store in regs structure
-
- cli
- nop
- stgi
-
- add $16, %rsp
-
- // restore callee saved registers
- pop %rbp
- pop %r15
- pop %r14
- pop %r13
- pop %r12
- pop %rbx
-
- ret
-#endif
-
-
.bss
.space 4096
.global dbf_stack_top
--- /dev/null
+ .p2align(4)
+ .globl resume_vm_svm
+resume_vm_svm:
+
+ // save callee saved regs
+ push %rbx
+ push %r12
+ push %r13
+ push %r14
+ push %r15
+ push %rbp
+
+ mov %rdi, %rax // first arg goes to rax for vm*
+ push %rsi // store pointer to register struct
+
+ clgi
+
+ sti
+ nop
+
+ // restore guest GP regs
+ mov 8(%rsi), %rdx
+ mov 16(%rsi), %rcx
+ mov 24(%rsi), %rdi
+ mov 32(%rsi), %r8
+ mov 40(%rsi), %r9
+ mov 48(%rsi), %rbx
+ mov 56(%rsi), %rbp
+ mov 64(%rsi), %r10
+ mov 72(%rsi), %r11
+ mov 80(%rsi), %r12
+ mov 88(%rsi), %r13
+ mov 96(%rsi), %r14
+ mov 104(%rsi), %r15
+ mov (%rsi), %rsi
+
+ // TODO: Debugregs
+
+ // rax used as implicit operand for vm* instructions
+ vmload
+ vmrun
+ vmsave
+
+ push %rsi
+ mov 8(%rsp), %rsi // get previously saved register struct pointer
+
+ mov %rdx, 8(%rsi) // save guest GP registers
+ mov %rcx, 16(%rsi)
+ mov %rdi, 24(%rsi)
+ mov %r8, 32(%rsi)
+ mov %r9, 40(%rsi)
+ mov %rbx, 48(%rsi)
+ mov %rbp, 56(%rsi)
+ mov %r10, 64(%rsi)
+ mov %r11, 72(%rsi)
+ mov %r12, 80(%rsi)
+ mov %r13, 88(%rsi)
+ mov %r14, 96(%rsi)
+ mov %r15, 104(%rsi)
+
+ mov (%rsp), %rdx // guest rsi to rdx
+ mov %rdx, (%rsi) // store in regs structure
+
+ cli
+ nop
+ stgi
+
+ add $16, %rsp
+
+ // restore callee saved registers
+ pop %rbp
+ pop %r15
+ pop %r14
+ pop %r13
+ pop %r12
+ pop %rbx
+
+ ret
Unsigned32
Apic::get_num_errors()
{
+ reg_write(APIC_esr, 0);
return reg_read(APIC_esr);
}
Apic::clear_num_errors()
{
reg_write(APIC_esr, 0);
+ reg_write(APIC_esr, 0);
}
PUBLIC static inline
Apic::map_apic_page()
{
Address offs;
- Address base = Cpu::rdmsr(APIC_base_msr) & 0xfffff000;
+ Address base = apic_page_phys();
// We should not change the physical address of the Local APIC page if
// possible since some versions of VMware would complain about a
// non-implemented feature
if (ignore_invalid_apic_reg_access)
return;
- printf("APIC invalid register access error at "L4_PTR_FMT"\n",
- regs->ip());
+ printf("cpu%d: APIC invalid register access error at "L4_PTR_FMT"\n",
+ current_cpu(), regs->ip());
return;
}
apic_error_cnt++;
- printf("APIC error %08x(%08x)\n", err1, err2);
+ printf("cpu%d: APIC error %08x(%08x)\n", current_cpu(), err1, err2);
}
// deactivate APIC by writing to appropriate MSR
Tlb_inst_4M,
Tlb_data_4k_4M,
Tlb_inst_4k_4M,
+ Tlb_data_2M_4M,
};
enum
{ 0x52, Tlb_inst_4k_4M, 256, 0, 0 },
{ 0x56, Tlb_data_4M, 16, 4, 0 },
{ 0x57, Tlb_data_4k, 16, 4, 0 },
+ { 0x59, Tlb_data_4k, 16, 0, 0 },
+ { 0x5A, Tlb_data_2M_4M, 32, 4, 0 },
{ 0x5B, Tlb_data_4k_4M, 64, 0, 0 },
{ 0x5C, Tlb_data_4k_4M, 128, 0, 0 },
{ 0x5D, Tlb_data_4k_4M, 256, 0, 0 },
{ 0x7D, Cache_l2, 2048, 8, 64 },
{ 0x7E, Cache_l2, 256, 8, 128 },
{ 0x7F, Cache_l2, 512, 2, 64 },
+ { 0x80, Cache_l2, 512, 16, 64 },
{ 0x82, Cache_l2, 256, 8, 32 },
{ 0x83, Cache_l2, 512, 8, 32 },
{ 0x84, Cache_l2, 1024, 8, 32 },
/** Hardware interrupt entry point. Calls corresponding Dirq instance's
Dirq::hit() method.
- @param irqobj hardware-interrupt object
+ @param irqobj hardware-interrupt object
*/
extern "C" FIASCO_FASTCALL
void
Timer::acknowledge();
Timer::update_system_clock();
- Irq::log_irq(0, Config::scheduler_irq_vector);
+ Irq::log_timer_irq(Config::scheduler_irq_vector);
(void)ip;
irq_spinners(Config::scheduler_irq_vector);
EXTENSION class Ipi
{
private:
- static Per_cpu<unsigned> _count;
+ Unsigned32 _apic_id;
+ unsigned _count;
+
public:
enum Message
{
//---------------------------------------------------------------------------
IMPLEMENTATION[mp]:
-Per_cpu<unsigned> DEFINE_PER_CPU Ipi::_count; // debug
-
#include <cstdio>
#include "apic.h"
-#include "cpu.h"
#include "kmem.h"
+PUBLIC inline
+Ipi::Ipi() : _apic_id(~0)
+{}
+
+IMPLEMENT inline NEEDS["apic.h"]
+void
+Ipi::init()
+{
+ _apic_id = Apic::get_id();
+}
+
+
PUBLIC static inline
void
Ipi::ipi_call_debug_arch()
stat_received();
}
-PUBLIC static inline NEEDS["apic.h", "cpu.h"]
+PUBLIC inline NEEDS["apic.h"]
void
-Ipi::send(int logical_cpu, Message m)
+Ipi::send(Message m)
{
- Apic::mp_send_ipi(Cpu::cpus.cpu(logical_cpu).phys_id(), (Unsigned8)m);
- stat_sent(logical_cpu);
+ Apic::mp_send_ipi(_apic_id, (Unsigned8)m);
+ stat_sent();
}
PUBLIC static inline NEEDS["apic.h"]
}
#if defined(CONFIG_IRQ_SPINNER)
-#include "apic.h"
// debug
PRIVATE static
void Ipi::ipi_call_spin()
{
- int cpu = Cpu::p2l(Apic::get_id());
- if (cpu >= 0)
- *(unsigned char*)(Mem_layout::Adap_vram_cga_beg + 22*160 + cpu*+2)
- = '0' + (_count.cpu(cpu)++ % 10);
+ unsigned cpu;
+ Ipi *ipi = 0;
+ for (cpu = 0; cpu < Config::Max_num_cpus; ++cpu)
+ {
+ if (!Per_cpu_data::valid(cpu))
+ continue;
+
+ if (Ipi::cpu(cpu)._apic_id == Apic::get_id())
+ {
+ ipi = &Ipi::cpu(cpu);
+ break;
+ }
+ }
+
+ if (!ipi)
+ return;
+
+ *(unsigned char*)(Mem_layout::Adap_vram_cga_beg + 22*160 + cpu*+2)
+ = '0' + (ipi->_count++ % 10);
}
#endif
#include "div32.h"
#include "fpu.h"
#include "globals.h"
+#include "ipi.h"
#include "kernel_task.h"
#include "processor.h"
#include "per_cpu_data_alloc.h"
Utcb_init::init_ap(cpu);
Apic::init_ap();
+ Ipi::cpu(_cpu).init();
Timer::init();
Apic::check_still_getting_interrupts();
#include "fpu.h"
#include "idt.h"
#include "initcalls.h"
+#include "ipi.h"
#include "kernel_console.h"
#include "kernel_task.h"
#include "kip_init.h"
Idt::init();
Fpu::init(0);
Apic::init();
+ Ipi::cpu(0).init();
Timer::init();
Timer::master_cpu(0);
Apic::check_still_getting_interrupts();
Unsigned32 eax, ebx, ecx, edx;
c.cpuid (0x8000000a, &eax, &ebx, &ecx, &edx);
if (edx & 1)
- {
- printf("Nested Paging supported\n");
- _has_npt = true;
- }
+ {
+ printf("Nested Paging supported\n");
+ _has_npt = true;
+ }
printf("NASID: 0x%x\n", ebx);
_max_asid = ebx - 1;
assert(_max_asid > 0);
/* clean out vmcb */
memset(_kernel_vmcb, 0, Vmcb_size);
- /* 8kB MSR permission map */
+ /* 8kB MSR permission map */
check(_msrpm = Mapped_allocator::allocator()->unaligned_alloc(Msr_pm_size));
_msrpm_base_pa = Kmem::virt_to_phys(_msrpm);
memset(_msrpm, ~0, Msr_pm_size);
--- /dev/null
+INTERFACE:
+
+#include "task.h"
+
+class Vm : public Task
+{
+public:
+ ~Vm() {}
+
+ void invoke(L4_obj_ref obj, Mword rights, Syscall_frame *f, Utcb *utcb) = 0;
+
+ enum Operation
+ {
+ Vm_run_op = Task::Vm_ops + 0,
+ };
+};
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION:
+
+#include "cpu.h"
+
+class Mem_space_vm : public Mem_space
+{
+public:
+ Mem_space_vm(Ram_quota *q) : Mem_space(q, false) {}
+ virtual Page_number map_max_address() const
+ { return Page_number::create(1UL << (MWORD_BITS - Page_shift)); }
+};
+
+struct Vm_space_factory
+{
+ /** Create a usual Mem_space object. */
+ template< typename A1 >
+ static void create(Mem_space *v, A1 a1)
+ { new (v) Mem_space_vm(a1); }
+
+ template< typename S >
+ static void create(S *v)
+ { new (v) S(); }
+};
+
+
+PUBLIC
+Vm::Vm(Ram_quota *q)
+ : Task(Vm_space_factory(), q, L4_fpage(0))
+{
+}
+
+
+PUBLIC static
+template< typename VM >
+slab_cache_anon *
+Vm::allocator()
+{
+ static slab_cache_anon *slabs = new Kmem_slab_simple (sizeof (VM),
+ sizeof (Mword),
+ "Vm");
+ return slabs;
+}
+
+
+PUBLIC
+template< typename Vm_impl >
+void
+Vm::vm_invoke(L4_obj_ref obj, Mword rights, Syscall_frame *f, Utcb *utcb)
+{
+ if (EXPECT_FALSE(f->tag().proto() != L4_msg_tag::Label_task))
+ {
+ f->tag(commit_result(-L4_err::EBadproto));
+ return;
+ }
+
+ switch (utcb->values[0])
+ {
+ case Vm_run_op:
+ f->tag(static_cast<Vm_impl *>(this)->sys_vm_run(f, utcb));
+ return;
+ default:
+ Task::invoke(obj, rights, f, utcb);
+ return;
+ }
+}
--- /dev/null
+IMPLEMENTATION [svm]:
+
+#include "ram_quota.h"
+#include "svm.h"
+#include "vm_svm.h"
+
+PRIVATE static inline
+template< typename VM >
+VM *
+Vm_factory::allocate(Ram_quota *quota)
+{
+ if (void *t = Vm::allocator<VM>()->q_alloc(quota))
+ {
+ VM *a = new (t) VM(quota);
+ if (a->valid())
+ return a;
+
+ delete a;
+ }
+
+ return 0;
+}
+
+IMPLEMENT
+Vm *
+Vm_factory::create(Ram_quota *quota)
+{
+ if (Svm::cpus.cpu(current_cpu()).svm_enabled())
+ return allocate<Vm_svm>(quota);
+
+ return 0;
+}
+
+IMPLEMENTATION [!svm]:
+
+IMPLEMENT
+Vm *
+Vm_factory::create(Ram_quota *)
+{ return 0; }
--- /dev/null
+INTERFACE [svm]:
+
+#include "config.h"
+#include "vm.h"
+
+class Vmcb;
+
+class Vm_svm : public Vm
+{
+private:
+ static void resume_vm_svm(Mword phys_vmcb, Mword *regs)
+ asm("resume_vm_svm") __attribute__((__regparm__(3)));
+ Unsigned8 _asid[Config::Max_num_cpus];
+ Unsigned32 _asid_generation[Config::Max_num_cpus];
+
+ enum
+ {
+ EFER_LME = 1 << 8,
+ EFER_LMA = 1 << 10,
+ };
+};
+
+// ------------------------------------------------------------------------
+INTERFACE [svm && debug]:
+
+EXTENSION class Vm_svm
+{
+protected:
+ struct Log_vm_svm_exit
+ {
+ Mword exitcode, exitinfo1, exitinfo2, rip;
+ };
+
+ static unsigned log_fmt_svm(Tb_entry *, int max, char *buf) asm ("__fmt_vm_svm_exit");
+};
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [svm]:
+
+#include "context.h"
+#include "mem_space.h"
+#include "fpu.h"
+#include "ref_ptr.h"
+#include "svm.h"
+#include "thread.h" // XXX: circular dep, move this out here!
+#include "thread_state.h" // XXX: circular dep, move this out here!
+
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [svm && ia32]:
+
+#include "virt.h"
+
+PRIVATE static inline
+bool
+Vm_svm::is_64bit()
+{ return false; }
+
+PRIVATE inline NEEDS["virt.h"]
+Address
+Vm_svm::get_vm_cr3(Vmcb *)
+{
+ // When running in 32bit mode we already return the page-table of our Vm
+ // object, whether we're running with shadow or nested paging
+ return mem_space()->phys_dir();
+}
+
+//----------------------------------------------------------------------------
+IMPLEMENTATION [svm && amd64]:
+
+#include "virt.h"
+
+PRIVATE static inline
+bool
+Vm_svm::is_64bit()
+{ return true; }
+
+PRIVATE inline NEEDS["virt.h"]
+Address
+Vm_svm::get_vm_cr3(Vmcb *v)
+{
+ // When we have nested paging, we just return the 4lvl host page-table of
+ // our Vm.
+ if (v->np_enabled())
+ return mem_space()->phys_dir();
+
+ // When running with shadow paging and the guest is running in long mode
+ // and has paging enabled, we can just return the 4lvl page table of our
+ // host Vm object.
+ if ( (v->state_save_area.efer & EFER_LME)
+ && (v->state_save_area.cr0 & CR0_PG))
+ return mem_space()->phys_dir();
+
+ // Now it's getting tricky when running with shadow paging.
+ // We need to obey the following rules:
+ // - When the guest is not running in 64bit mode the CR3 one can set for
+ // the page-table must be below 4G physical memory (i.e. bit 32-63 must
+ // be zero). This is unfortunate when the host has memory above 4G as
+ // Fiasco gets its memory from the end of physical memory, i.e.
+ // page-table memory is above 4G.
+ // - We need an appropriate page-table format for 32bit!
+ // That means either a 2lvl page-table or a 3lvl PAE one. That would
+ // require to maintain two page-tables for the guest, one for 32bit
+ // mode execution and one for 64 bit execution. It is needed either for
+ // the transition from real to long-mode via protected mode or for
+ // 32bit only guests.
+ // There's one trick to avoid having two PTs: 4lvl-PTs and 3lvl-PAE-PTs
+ // have much in common so that it's possible to just take the the PDPE
+ // one of the host as the 3lvl-PAE-PT for the guest. Well, not quite.
+ // The problem is that SVM checks that MBZ bits in the PAE-PT entries
+ // are really 0 as written in the spec. Now the 4lvl PT contains rights
+ // bits there, so that this type of PT is refused and does not work on
+ // real hardware.
+ // So why is the code still here? Well, QEmu isn't so picky about the
+ // bits in the PDPE and it thus works there...
+ Address vm_cr3 = mem_space()->dir()->walk(Virt_addr(0), 0).e->addr();
+ if (EXPECT_FALSE(!vm_cr3))
+ {
+ // force allocation of new secondary page-table level
+ mem_space()->dir()->alloc_cast<Mem_space_q_alloc>()
+ ->walk(Virt_addr(0), 1, Mem_space_q_alloc(ram_quota(),
+ Mapped_allocator::allocator()));
+ vm_cr3 = mem_space()->dir()->walk(Virt_addr(0), 0).e->addr();
+ }
+
+ if (EXPECT_FALSE(vm_cr3 >= 1UL << 32))
+ {
+ WARN("svm: Host page-table not under 4G, sorry.\n");
+ return 0;
+ }
+
+ return vm_cr3;
+}
+
+//----------------------------------------------------------------------------
+IMPLEMENTATION [svm]:
+
+PRIVATE inline
+Unsigned8
+Vm_svm::asid ()
+{
+ return _asid[current_cpu()];
+}
+
+PRIVATE inline
+void
+Vm_svm::asid (Unsigned8 asid)
+{
+ _asid[current_cpu()] = asid;
+}
+
+PRIVATE inline
+Unsigned32
+Vm_svm::asid_generation ()
+{
+ return _asid_generation[current_cpu()];
+}
+
+PRIVATE inline
+void
+Vm_svm::asid_generation (Unsigned32 generation)
+{
+ _asid_generation[current_cpu()] = generation;
+}
+
+PUBLIC
+Vm_svm::Vm_svm(Ram_quota *q)
+ : Vm(q)
+{
+ memset(_asid, 0, sizeof(_asid));
+ memset(_asid_generation, 0, sizeof(_asid_generation));
+}
+
+PUBLIC inline
+void *
+Vm_svm::operator new (size_t size, void *p)
+{
+ assert (size == sizeof (Vm_svm));
+ return p;
+}
+
+PUBLIC
+void
+Vm_svm::operator delete (void *ptr)
+{
+ Vm_svm *t = reinterpret_cast<Vm_svm*>(ptr);
+ allocator<Vm_svm>()->q_free(t->ram_quota(), ptr);
+}
+
+
+// to do:
+// - handle cr2
+// - force fpu ownership
+// - debug registers not covered by VMCB
+
+PRIVATE
+void
+Vm_svm::copy_state_save_area(Vmcb *dest, Vmcb *src)
+{
+ Vmcb_state_save_area *d = &dest->state_save_area;
+ Vmcb_state_save_area *s = &src->state_save_area;
+
+ d->es_sel = s->es_sel;
+ d->es_attrib = s->es_attrib;
+ d->es_limit = s->es_limit;
+ d->es_base = s->es_base;
+
+ d->cs_sel = s->cs_sel;
+ d->cs_attrib = s->cs_attrib;
+ d->cs_limit = s->cs_limit;
+ d->cs_base = s->cs_base;
+
+ d->ss_sel = s->ss_sel;
+ d->ss_attrib = s->ss_attrib;
+ d->ss_limit = s->ss_limit;
+ d->ss_base = s->ss_base;
+
+ d->ds_sel = s->ds_sel;
+ d->ds_attrib = s->ds_attrib;
+ d->ds_limit = s->ds_limit;
+ d->ds_base = s->ds_base;
+
+ d->fs_sel = s->fs_sel;
+ d->fs_attrib = s->fs_attrib;
+ d->fs_limit = s->fs_limit;
+ d->fs_base = s->fs_base;
+
+ d->gs_sel = s->gs_sel;
+ d->gs_attrib = s->gs_attrib;
+ d->gs_limit = s->gs_limit;
+ d->gs_base = s->gs_base;
+
+ d->gdtr_sel = s->gdtr_sel;
+ d->gdtr_attrib = s->gdtr_attrib;
+ d->gdtr_limit = s->gdtr_limit;
+ d->gdtr_base = s->gdtr_base;
+
+ d->ldtr_sel = s->ldtr_sel;
+ d->ldtr_attrib = s->ldtr_attrib;
+ d->ldtr_limit = s->ldtr_limit;
+ d->ldtr_base = s->ldtr_base;
+
+ d->idtr_sel = s->idtr_sel;
+ d->idtr_attrib = s->idtr_attrib;
+ d->idtr_limit = s->idtr_limit;
+ d->idtr_base = s->idtr_base;
+
+ d->tr_sel = s->tr_sel;
+ d->tr_attrib = s->tr_attrib;
+ d->tr_limit = s->tr_limit;
+ d->tr_base = s->tr_base;
+
+ d->cpl = s->cpl;
+ d->efer = s->efer;
+
+ d->cr4 = s->cr4;
+ d->cr3 = s->cr3;
+ d->cr0 = s->cr0;
+ d->dr7 = s->dr7;
+ d->dr6 = s->dr6;
+ d->rflags = s->rflags;
+
+ d->rip = s->rip;
+ d->rsp = s->rsp;
+ d->rax = s->rax;
+
+ d->star = s->star;
+ d->lstar = s->lstar;
+ d->cstar = s->cstar;
+ d->sfmask = s->sfmask;
+ d->kernelgsbase = s->kernelgsbase;
+ d->sysenter_cs = s->sysenter_cs;
+ d->sysenter_esp = s->sysenter_esp;
+ d->sysenter_eip = s->sysenter_eip;
+ d->cr2 = s->cr2;
+
+ d->g_pat = s->g_pat;
+ d->dbgctl = s->dbgctl;
+ d->br_from = s->br_from;
+ d->br_to = s->br_to;
+ d->lastexcpfrom = s->lastexcpfrom;
+ d->last_excpto = s->last_excpto;
+}
+
+
+PRIVATE
+void
+Vm_svm::copy_control_area(Vmcb *dest, Vmcb *src)
+{
+ Vmcb_control_area *d = &dest->control_area;
+ Vmcb_control_area *s = &src->control_area;
+
+ d->intercept_rd_crX = s->intercept_rd_crX;
+ d->intercept_wr_crX = s->intercept_wr_crX;
+
+ d->intercept_rd_drX = s->intercept_rd_drX;
+ d->intercept_wr_drX = s->intercept_wr_drX;
+
+ d->intercept_exceptions = s->intercept_exceptions;
+
+ d->intercept_instruction0 = s->intercept_instruction0;
+ d->intercept_instruction1 = s->intercept_instruction1;
+
+ // skip iopm_base_pa and msrpm_base_pa
+
+ d->tsc_offset = s->tsc_offset;
+ d->guest_asid_tlb_ctl = s->guest_asid_tlb_ctl;
+ d->interrupt_ctl = s->interrupt_ctl;
+ d->interrupt_shadow = s->interrupt_shadow;
+ d->exitcode = s->exitcode;
+ d->exitinfo1 = s->exitinfo1;
+ d->exitinfo2 = s->exitinfo2;
+ d->exitintinfo = s->exitintinfo;
+ d->np_enable = s->np_enable;
+
+ d->eventinj = s->eventinj;
+ d->n_cr3 = s->n_cr3;
+ d->lbr_virtualization_enable = s->lbr_virtualization_enable;
+}
+
+
+/* skip anything that does not change */
+PRIVATE
+void
+Vm_svm::copy_control_area_back(Vmcb *dest, Vmcb *src)
+{
+ Vmcb_control_area *d = &dest->control_area;
+ Vmcb_control_area *s = &src->control_area;
+
+ d->interrupt_ctl = s->interrupt_ctl;
+ d->interrupt_shadow = s->interrupt_shadow;
+
+ d->exitcode = s->exitcode;
+ d->exitinfo1 = s->exitinfo1;
+ d->exitinfo2 = s->exitinfo2;
+ d->exitintinfo = s->exitintinfo;
+
+ d->eventinj = s->eventinj;
+}
+
+/** \brief Choose an ASID for this Vm.
+ *
+ * Choose an ASID for this Vm. The ASID provided by userspace is ignored
+ * instead the kernel picks one.
+ * Userspace uses the flush-bit to receive a new ASID for this Vm.
+ * All ASIDs are flushed as soon as the kernel runs out of ASIDs.
+ *
+ * @param vmcb_s external VMCB provided by userspace
+ * @param kernel_vmcb_s our VMCB
+ *
+ */
+PRIVATE
+void
+Vm_svm::configure_asid (Vmcb *vmcb_s, Vmcb *kernel_vmcb_s)
+{
+ assert (cpu_lock.test());
+
+ Svm &s = Svm::cpus.cpu(current_cpu());
+
+ if (// vmm requests flush
+ ((vmcb_s->control_area.guest_asid_tlb_ctl >> 32) & 1) == 1 ||
+ // our asid is not valid or expired
+ !(s.asid_valid(asid(), asid_generation())))
+ {
+ asid(s.next_asid());
+ asid_generation(s.global_asid_generation());
+ }
+
+ assert(s.asid_valid(asid(), asid_generation()));
+#if 1
+ kernel_vmcb_s->control_area.guest_asid_tlb_ctl = asid();
+ if (s.flush_all_asids())
+ {
+ kernel_vmcb_s->control_area.guest_asid_tlb_ctl |= (1ULL << 32);
+ s.flush_all_asids(false);
+ }
+#else
+ kernel_vmcb_s->control_area.guest_asid_tlb_ctl = 1;
+ kernel_vmcb_s->control_area.guest_asid_tlb_ctl |= (1ULL << 32);
+#endif
+}
+
+PUBLIC
+L4_msg_tag
+Vm_svm::sys_vm_run(Syscall_frame *f, Utcb *utcb)
+{
+ //Mword host_cr0;
+ Unsigned64 orig_cr3, orig_ncr3;
+
+ assert (cpu_lock.test());
+
+ /* these 4 must not use ldt entries */
+ assert (!(Cpu::get_cs() & (1 << 2)));
+ assert (!(Cpu::get_ss() & (1 << 2)));
+ assert (!(Cpu::get_ds() & (1 << 2)));
+ assert (!(Cpu::get_es() & (1 << 2)));
+
+ Svm &s = Svm::cpus.cpu(current_cpu());
+
+ L4_msg_tag const &tag = f->tag();
+
+ if (EXPECT_FALSE(!s.svm_enabled()))
+ {
+ WARN("svm: not supported/enabled\n");
+ return commit_result(-L4_err::EInval);
+ }
+
+ if (EXPECT_FALSE(tag.words() < 1 + Svm::Gpregs_words))
+ {
+ WARN("svm: Invalid message length\n");
+ return commit_result(-L4_err::EInval);
+ }
+
+ L4_snd_item_iter vmcb_item(utcb, tag.words());
+
+ if (EXPECT_FALSE(!tag.items() || !vmcb_item.next()))
+ return commit_result(-L4_err::EInval);
+
+ L4_fpage vmcb_fpage(vmcb_item.get()->d);
+
+ if (EXPECT_FALSE(!vmcb_fpage.is_mempage()))
+ {
+ WARN("svm: Fpage invalid\n");
+ return commit_error(utcb, L4_error::Overflow);
+ }
+
+ if (EXPECT_FALSE(vmcb_fpage.order() < 12))
+ return commit_result(-L4_err::EInval);
+
+ Vmcb *vmcb_s = (Vmcb *)(Virt_addr(vmcb_fpage.mem_address()).value());
+ Vmcb *kernel_vmcb_s = s.kernel_vmcb();
+
+ if (EXPECT_FALSE(vmcb_s->np_enabled() && !s.has_npt()))
+ {
+ WARN("svm: No NPT available\n");
+ return commit_result(-L4_err::EInval);
+ }
+
+ Address vm_cr3 = get_vm_cr3(vmcb_s);
+ // can only fail on 64bit, will be optimized away on 32bit
+ if (EXPECT_FALSE(is_64bit() && !vm_cr3))
+ return commit_result(-L4_err::ENomem);
+
+ Mem_space::Phys_addr phys_vmcb;
+ Mem_space::Size size;
+ bool resident;
+ unsigned int page_attribs;
+
+ Mem_space *const curr_mem_space = current()->space()->mem_space();
+ resident = curr_mem_space->v_lookup(Virt_addr(vmcb_s), &phys_vmcb, &size, &page_attribs);
+
+ if (!resident)
+ {
+ WARN("svm: VMCB invalid\n");
+ return commit_result(-L4_err::EInval);
+ }
+#if 0
+ // currently only support for nested pagetables
+ // if shadow page tables are to be allowed then cr0
+ // needs further scrutiny and cr3 must not be accessible
+ if((vmcb_s->control_area.np_enable & 1) != 1)
+ return commit_result(-L4_err::EInval);
+#endif
+
+ // neither EFER.LME nor EFER.LMA must be set
+ if (EXPECT_FALSE(!is_64bit()
+ && (vmcb_s->state_save_area.efer & (EFER_LME | EFER_LMA))))
+ {
+ WARN("svm: EFER invalid %llx\n", vmcb_s->state_save_area.efer);
+ return commit_result(-L4_err::EInval);
+ }
+
+ // EFER.SVME must be set
+ if (!(vmcb_s->state_save_area.efer & 0x1000))
+ {
+ WARN("svm: EFER invalid %llx\n", vmcb_s->state_save_area.efer);
+ return commit_result(-L4_err::EInval);
+ }
+ // allow PAE in combination with NPT
+#if 0
+ // CR4.PAE must be clear
+ if(vmcb_s->state_save_area.cr4 & 0x20)
+ return commit_result(-L4_err::EInval);
+#endif
+
+ // XXX:
+ // This generates a circular dep between thread<->task, this cries for a
+ // new abstraction...
+ if (!(current()->state() & Thread_fpu_owner))
+ {
+ if (!current_thread()->switchin_fpu())
+ {
+ WARN("svm: switchin_fpu failed\n");
+ return commit_result(-L4_err::EInval);
+ }
+ }
+
+#if 0 //should never happen
+ host_cr0 = Cpu::get_cr0();
+ // the VMM does not currently own the fpu but wants to
+ // make it available for the guest. This may happen
+ // if it was descheduled between activating the fpu and
+ // executing the vm_run operation
+ if (!(vmcb_s->state_save_area.cr0 & 0x8) && (host_cr0 & 0x8))
+ {
+ WARN("svm: FPU TS\n");
+ return commit_result(-L4_err::EInval);
+ }
+#endif
+
+ // increment our refcount, and drop it at the end automatically
+ Ref_ptr<Vm_svm> pin_myself(this);
+
+ // sanitize VMCB
+
+ orig_cr3 = vmcb_s->state_save_area.cr3;
+ orig_ncr3 = vmcb_s->control_area.n_cr3;
+
+ copy_control_area(kernel_vmcb_s, vmcb_s);
+ copy_state_save_area(kernel_vmcb_s, vmcb_s);
+
+ if (EXPECT_FALSE(is_64bit() && !kernel_vmcb_s->np_enabled()
+ && (kernel_vmcb_s->state_save_area.cr0 & CR0_PG)
+ && !(kernel_vmcb_s->state_save_area.cr4 & CR4_PAE)))
+ {
+ WARN("svm: No 32bit shadow page-tables on AMD64, use PAE!\n");
+ return commit_result(-L4_err::EInval);
+ }
+
+ // set MCE according to host
+ kernel_vmcb_s->state_save_area.cr4 |= Cpu::get_cr4() & CR4_MCE;
+
+ // allow w access to cr0, cr2, cr3
+ // allow r access to cr0, cr2, cr3, cr4
+ // to do: check if enabling PAE in cr4 needs to be controlled
+
+ // allow r/w access to dr[0-7]
+ kernel_vmcb_s->control_area.intercept_rd_drX |= 0xff00;
+ kernel_vmcb_s->control_area.intercept_wr_drX |= 0xff00;
+
+#if 0
+ // intercept exception vectors 0-31
+ kernel_vmcb_s->control_area.intercept_exceptions = 0xffffffff;
+#endif
+
+ // enable iopm and msrpm
+ kernel_vmcb_s->control_area.intercept_instruction0 |= 0x18000000;
+ // intercept FERR_FREEZE and shutdown events
+ kernel_vmcb_s->control_area.intercept_instruction0 |= 0xc0000000;
+ // intercept INTR/NMI/SMI/INIT
+ kernel_vmcb_s->control_area.intercept_instruction0 |= 0xf;
+ // intercept INVD
+ kernel_vmcb_s->control_area.intercept_instruction0 |= (1 << 22);
+ // intercept HLT
+ kernel_vmcb_s->control_area.intercept_instruction0 |= (1 << 24);
+ // intercept task switch
+ kernel_vmcb_s->control_area.intercept_instruction0 |= (1 << 29);
+ // intercept shutdown
+ kernel_vmcb_s->control_area.intercept_instruction0 |= (1 << 31);
+ // intercept MONITOR/MWAIT
+ kernel_vmcb_s->control_area.intercept_instruction1 |= (1 << 10) | (1 << 11);
+
+ // intercept virtualization related instructions
+ // vmrun interception is required by the hardware
+ kernel_vmcb_s->control_area.intercept_instruction1 |= 0xff;
+
+ Mword kernel_vmcb_pa = s.kernel_vmcb_pa();
+ Unsigned64 iopm_base_pa = s.iopm_base_pa();
+ Unsigned64 msrpm_base_pa = s.msrpm_base_pa();
+
+ kernel_vmcb_s->control_area.iopm_base_pa = iopm_base_pa;
+ kernel_vmcb_s->control_area.msrpm_base_pa = msrpm_base_pa;
+
+ configure_asid(vmcb_s, kernel_vmcb_s);
+
+ // 7:0 V_TPR, 8 V_IRQ, 15:9 reserved SBZ,
+ // 19:16 V_INTR_PRIO, 20 V_IGN_TPR, 23:21 reserved SBZ
+ // 24 V_INTR_MASKING 31:25 reserved SBZ
+ // 39:32 V_INTR_VECTOR, 63:40 reserved SBZ
+#if 0
+ kernel_vmcb_s->control_area.interrupt_ctl = 0x10f0000;
+#endif
+ // enable IRQ masking virtualization
+ kernel_vmcb_s->control_area.interrupt_ctl |= 0x01000000;
+
+#if 0
+ // 0 INTERRUPT_SHADOW, 31:1 reserved SBZ
+ // 63:32 reserved SBZ
+ kernel_vmcb_s->control_area.interrupt_shadow = 0;
+#endif
+
+ kernel_vmcb_s->control_area.exitcode = 0;
+ kernel_vmcb_s->control_area.exitinfo1 = 0;
+ kernel_vmcb_s->control_area.exitinfo2 = 0;
+ kernel_vmcb_s->control_area.exitintinfo = 0;
+
+#if 0
+ // 0/1 NP_ENABLE, 31:1 reserved SBZ
+ kernel_vmcb_s->control_area.np_enable = 1;
+
+ // 31 VALID, EVENTINJ
+ kernel_vmcb_s->control_area.eventinj = 0;
+#endif
+
+ // N_CR3
+ kernel_vmcb_s->control_area.n_cr3 = vm_cr3;
+
+ if (!kernel_vmcb_s->np_enabled())
+ {
+ // to do: check that the vmtask has the
+ // VM property set, i.e. does not contain mappings
+ // to the fiasco kernel regions or runs with PL 3
+
+ // printf("nested paging disabled, use n_cr3 as cr3\n");
+ kernel_vmcb_s->state_save_area.cr3 = vm_cr3;
+
+ // intercept accesses to cr0, cr3 and cr4
+ kernel_vmcb_s->control_area.intercept_rd_crX = 0xfff9;
+ kernel_vmcb_s->control_area.intercept_wr_crX = 0xfff9;
+ }
+
+#if 0
+ kernel_vmcb_s->control_area.lbr_virtualization_enable = 0;
+#endif
+
+
+ // to do:
+ // - initialize VM_HSAVE_PA (done)
+ // - supply trusted msrpm_base_pa and iopm_base_pa (done)
+ // - save host state not covered by VMRUN/VMEXIT (ldt, some segments etc) (done)
+ // - disable interupts (done)
+ // - trigger interecepted device and timer interrupts (done, not necessary)
+ // - check host CR0.TS (floating point registers) (done)
+
+ Unsigned64 sysenter_cs, sysenter_eip, sysenter_esp;
+ Unsigned32 fs, gs;
+ Unsigned16 tr, ldtr;
+ //Unsigned32 cr4;
+
+ sysenter_cs = Cpu::rdmsr(MSR_SYSENTER_CS);
+ sysenter_eip = Cpu::rdmsr(MSR_SYSENTER_EIP);
+ sysenter_esp = Cpu::rdmsr(MSR_SYSENTER_ESP);
+
+ fs = Cpu::get_fs();
+ gs = Cpu::get_gs();
+ tr = Cpu::get_tr();
+ ldtr = Cpu::get_ldt();
+
+ Gdt_entry tr_entry;
+
+ tr_entry = (*Cpu::cpus.cpu(current_cpu()).get_gdt())[tr / 8];
+
+#if 0
+ // to do: check if the nested page table walker looks
+ // into the TLB. if so, global pages have to be disabled in
+ // the host
+ cr4 = Cpu::get_cr4();
+
+ if (cr4 & CR4_PGE)
+ // disable support for global pages as the vm task has
+ // a divergent upper memory region from the regular tasks
+ Cpu::set_cr4(cr4 & ~CR4_PGE);
+#endif
+
+ resume_vm_svm(kernel_vmcb_pa, &utcb->values[1]);
+
+
+#if 0
+ if (cr4 & CR4_PGE)
+ Cpu::set_cr4(cr4);
+#endif
+
+ Cpu::wrmsr(sysenter_cs, MSR_SYSENTER_CS);
+ Cpu::wrmsr(sysenter_eip, MSR_SYSENTER_EIP);
+ Cpu::wrmsr(sysenter_esp, MSR_SYSENTER_ESP);
+
+ Cpu::set_ldt(ldtr);
+ Cpu::set_fs(fs);
+ Cpu::set_gs(gs);
+
+ // clear busy flag
+ Gdt_entry tss_entry;
+
+ tss_entry = (*Cpu::cpus.cpu(current_cpu()).get_gdt())[tr / 8];
+ tss_entry.access &= 0xfd;
+ (*Cpu::cpus.cpu(current_cpu()).get_gdt())[tr / 8] = tss_entry;
+
+ Cpu::set_tr(tr); // TODO move under stgi in asm
+
+ copy_state_save_area(vmcb_s, kernel_vmcb_s);
+ copy_control_area_back(vmcb_s, kernel_vmcb_s);
+
+ if (!(vmcb_s->np_enabled()))
+ vmcb_s->state_save_area.cr3 = orig_cr3;
+
+ vmcb_s->control_area.n_cr3 = orig_ncr3;
+
+ LOG_TRACE("VM-SVM", "svm", current(), __fmt_vm_svm_exit,
+ Log_vm_svm_exit *l = tbe->payload<Log_vm_svm_exit>();
+ l->exitcode = vmcb_s->control_area.exitcode;
+ l->exitinfo1 = vmcb_s->control_area.exitinfo1;
+ l->exitinfo2 = vmcb_s->control_area.exitinfo2;
+ l->rip = vmcb_s->state_save_area.rip;
+ );
+
+ return commit_result(L4_error::None);
+}
+
+PUBLIC
+void
+Vm_svm::invoke(L4_obj_ref obj, Mword rights, Syscall_frame *f, Utcb *utcb)
+{
+ vm_invoke<Vm_svm>(obj, rights, f, utcb);
+}
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [svm && debug]:
+
+IMPLEMENT
+unsigned
+Vm_svm::log_fmt_svm(Tb_entry *e, int max, char *buf)
+{
+ Log_vm_svm_exit *l = e->payload<Log_vm_svm_exit>();
+ return snprintf(buf, max, "ec=%lx ei1=%08lx ei2=%08lx rip=%08lx",
+ l->exitcode, l->exitinfo1, l->exitinfo2, l->rip);
+}
class Ipi
{
public:
- static void init(unsigned _lcpu);
+ void init();
};
INTERFACE[!mp]:
static void (*_remote_call_func)(void *);
static void *_remote_call_func_data;
static unsigned long _remote_call_done;
+
+ static Per_cpu<Ipi> _ipi;
};
EXTENSION class Ipi
{
public:
- static Per_cpu <Mword> _stat_sent;
- static Per_cpu <Mword> _stat_received;
+ Mword _stat_sent;
+ Mword _stat_received;
};
// ------------------------------------------------------------------------
IMPLEMENTATION[!mp]:
-IMPLEMENT static inline
+PUBLIC static inline
+Ipi &
+Ipi::cpu(unsigned)
+{
+ return *reinterpret_cast<Ipi*>(0);
+}
+
+
+IMPLEMENT inline
void
-Ipi::init(unsigned)
+Ipi::init()
{}
-PUBLIC static inline
+PUBLIC inline
void
-Ipi::send(int, Message)
+Ipi::send(Message)
{}
PUBLIC static inline
Ipi::bcast(Message)
{}
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION[mp]:
+
+Per_cpu<Ipi> DEFINE_PER_CPU Ipi::_ipi;
+
+PUBLIC static inline
+Ipi &
+Ipi::cpu(unsigned cpu)
+{ return Ipi::_ipi.cpu(cpu); }
+
// ------------------------------------------------------------------------
IMPLEMENTATION[!(mp && debug)]:
PUBLIC static inline
void
-Ipi::stat_sent(unsigned)
+Ipi::stat_sent()
{}
PUBLIC static inline
#include "globals.h"
-Per_cpu <Mword> DEFINE_PER_CPU Ipi::_stat_sent;
-Per_cpu <Mword> DEFINE_PER_CPU Ipi::_stat_received;
-
-PUBLIC static inline
+PUBLIC inline
void
-Ipi::stat_sent(unsigned to_cpu)
-{ atomic_mp_add(&_stat_sent.cpu(to_cpu), 1); }
+Ipi::stat_sent()
+{ atomic_mp_add(&_stat_sent, 1); }
PUBLIC static inline NEEDS["globals.h"]
void
Ipi::stat_received()
-{ _stat_received.cpu(current_cpu())++; }
+{ _ipi.cpu(current_cpu())._stat_received++; }
// --------------------------------------------------------------------------
IMPLEMENTATION [debug]:
-#include "kobject.h"
-
PUBLIC
char const *
Chain_irq_pin::pin_type() const
Irq::irq_log_fmt(Tb_entry *e, int maxlen, char *buf)
{
Irq_log *l = e->payload<Irq_log>();
- return snprintf(buf, maxlen, "0x%x/%d D:%lx", l->irq_number, l->irq_number,
+ return snprintf(buf, maxlen, "0x%x/%u D:%lx", l->irq_number, l->irq_number,
l->irq_obj);
}
void
Irq::log_irq(Irq *irq, int nr)
{
- LOG_TRACE("IRQ", "irq", current(), __irq_log_fmt,
+ LOG_TRACE("IRQ-HW", "irq-hw", current(), __irq_log_fmt,
Irq::Irq_log *l = tbe->payload<Irq::Irq_log>();
l->irq_number = nr;
l->irq_obj = irq ? irq->dbg_id() : ~0UL;
);
}
-
+PUBLIC static inline NEEDS["config.h"]
+void
+Irq::log_timer_irq(int nr)
+{
+ LOG_TRACE("IRQ-Timer", "irq-ti", current(), __irq_log_fmt,
+ Irq::Irq_log *l = tbe->payload<Irq::Irq_log>();
+ l->irq_number = nr;
+ l->irq_obj = ~0UL;
+ );
+}
// --------------------------------------------------------------------------
IMPLEMENTATION [!debug]:
void
Irq::log_irq(Irq *, int)
{}
+
+PUBLIC static inline
+void
+Irq::log_timer_irq(int)
+{}
if (ipi)
{
//LOG_MSG_3VAL(this, "sipi", current_cpu(), cpu(), (Mword)current());
- Ipi::send(cpu, Ipi::Request);
+ Ipi::cpu(cpu).send(Ipi::Request);
}
return Drq::No_answer | Drq::Need_resched;
}
if (ipi)
- Ipi::send(cpu, Ipi::Request);
+ Ipi::cpu(cpu).send(Ipi::Request);
}
//----------------------------------------------------------------------------
EXTENSION class Ipi
{
+private:
+ Unsigned32 _lcpu;
+
public:
enum Message { Request = 'r', Global_request = 'g', Debug = 'd' };
};
#include "cpu.h"
#include "pic.h"
-IMPLEMENT static
+PUBLIC inline
+Ipi::Ipi() : _lcpu(~0)
+{}
+
+IMPLEMENT
void
-Ipi::init(unsigned lcpu)
+Ipi::init()
{
- Pic::setup_ipi(lcpu, Cpu::cpus.cpu(lcpu).phys_id());
+ _lcpu = current_cpu();
+ Pic::setup_ipi(_lcpu, Cpu::cpus.cpu(_lcpu).phys_id());
}
PUBLIC static inline NEEDS[<cstdio>]
{
}
-PUBLIC static inline NEEDS[<cstdio>, "pic.h"]
+PUBLIC inline NEEDS[<cstdio>, "pic.h"]
void
-Ipi::send(int lcpu, Message m)
+Ipi::send(Message m)
{
- Pic::send_ipi(lcpu, m);
+ printf("Sending IPI:%d to cpu%d\n", m, _lcpu);
+ Pic::send_ipi(_lcpu, m);
}
PUBLIC static inline NEEDS[<cstdio>, "cpu.h", "pic.h"]
void
Ipi::bcast(Message m)
{
+ printf("Bcast IPI:%d\n", m);
for (unsigned i = 0; i < Config::Max_num_cpus; ++i)
if (Cpu::online(i))
Pic::send_ipi(i, m);
Utcb_init::init();
Pic::init();
Dirq_pic_pin::init();
- Ipi::init(0);
+ Ipi::cpu(0).init();
Idt::init();
Fpu::init(0);
Timer::init();
--- /dev/null
+INTERFACE:
+
+class Vm;
+class Ram_quota;
+
+class Vm_factory
+{
+public:
+ static Vm *create(Ram_quota *quota);
+};
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
CONFIG_AMD64_K8=y
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
CONFIG_AMD64_K8=y
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+CONFIG_CPU_VIRT=y
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
CONFIG_AMD64_K8=y
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
# CONFIG_SCHED_PIT is not set
# CONFIG_SCHED_RTC is not set
CONFIG_SCHED_APIC=y
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
CONFIG_AMD64_K8=y
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
# CONFIG_SCHED_PIT is not set
# CONFIG_SCHED_RTC is not set
CONFIG_SCHED_APIC=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_ARM_TZ is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
CONFIG_ARM_TZ=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
CONFIG_PF_IMX=y
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
CONFIG_PF_IMX=y
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
CONFIG_PF_OMAP3=y
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
CONFIG_FPU=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
CONFIG_PF_TEGRA2=y
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
CONFIG_ARM_ALIGNMENT_CHECK=y
CONFIG_ARM_TZ=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
CONFIG_FPU=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
CONFIG_FPU=y
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
# CONFIG_PF_UX is not set
-CONFIG_PF_REALVIEW=y
# CONFIG_PF_IMX is not set
+CONFIG_PF_REALVIEW=y
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
# CONFIG_ARM_ALIGNMENT_CHECK is not set
# CONFIG_FPU is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+CONFIG_CPU_VIRT=y
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
# CONFIG_SCHED_PIT is not set
# CONFIG_SCHED_RTC is not set
CONFIG_SCHED_APIC=y
# CONFIG_PPC32 is not set
CONFIG_PF_PC=y
# CONFIG_PF_UX is not set
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
-# CONFIG_SVM is not set
+# CONFIG_CPU_VIRT is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_SCHED_APIC is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
CONFIG_PF_UX=y
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
CONFIG_PF_UX=y
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
# CONFIG_PPC32 is not set
# CONFIG_PF_PC is not set
CONFIG_PF_UX=y
-# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_IMX is not set
+# CONFIG_PF_REALVIEW is not set
# CONFIG_PF_S3C2410 is not set
# CONFIG_PF_TEGRA2 is not set
# CONFIG_PF_OMAP3 is not set
# CONFIG_IA32_P3 is not set
# CONFIG_IA32_P4 is not set
# CONFIG_IA32_PM is not set
+# CONFIG_IA32_CORE2 is not set
+# CONFIG_IA32_ATOM is not set
# CONFIG_IA32_K6 is not set
# CONFIG_IA32_K7 is not set
# CONFIG_IA32_K8 is not set
+# CONFIG_IA32_K10 is not set
# CONFIG_AMD64_K8 is not set
+# CONFIG_AMD64_CORE2 is not set
+# CONFIG_AMD64_ATOM is not set
+# CONFIG_AMD64_K10 is not set
# CONFIG_PPC32_603e is not set
CONFIG_SCHED_PIT=y
# CONFIG_SCHED_RTC is not set
$(foreach arch,$(TARGET_SYSTEMS), $(OBJ_DIR)/OBJ-$(arch)):%:%/$(BID_OBJ_Makefile) pre-obj
$(VERBOSE)PWD=$@ $(MAKE) $(PL_j) -C $@ -f $(BID_OBJ_Makefile)
+
+foreach_objdir = $(if $(wildcard $(OBJ_DIR)/OBJ-*), $(VERBOSE)set -e ; \
+ for d in $(wildcard $(OBJ_DIR)/OBJ-*) ; do \
+ PWD=$$d $(MAKE) -C $$d -f $(BID_OBJ_Makefile) $(1); \
+ done, @true)
+
%.i %.s.i:: export DO_SHOW_RESULT_FILE=y
-clean disasm %.i %.s.i::
- $(if $(wildcard $(OBJ_DIR)/OBJ-*), $(VERBOSE)set -e ; \
- for d in $(wildcard $(OBJ_DIR)/OBJ-*) ; do \
- PWD=$$d $(MAKE) -C $$d -f $(BID_OBJ_Makefile) $@; \
- done, @true)
+%.i %.s.i::
+ $(call foreach_objdir,$@)
+
+clean disasm::
+ $(call foreach_objdir,$@)
cleanall::
$(VERBOSE)$(RM) -r $(wildcard $(OBJ_DIR))
# 2: pcfilename
get_cont = $(if $($(1)_$(2)),$($(1)_$(2)),$($(1)))
-# 1: lib list
-convert_lib_list = \
- $(patsubst lib%.a,-l%,$(filter %.a,$(1))) \
- $(patsubst lib%.so,-l%,$(filter %.so,$(1))) \
- $(filter -l%,$(1))
-
$(OBJ_BASE)/pc/%.pc: $(GENERAL_D_LOC)
- $(VERBOSE)$(call generate_pcfile,$*,$@,$(call get_cont,CONTRIB_INCDIR,$*),$(call convert_lib_list,$(call get_cont,PC_LIBS,$*)),$(call get_cont,REQUIRES_LIBS,$*))
+ $(if $(filter-out -l%,$(call get_cont,PC_LIBS,$*)),$(error PC_LIBS contains invalid library list: $(call get_cont,PC_LIBS,$*); Only -l statements allowed.),@true)
+ $(VERBOSE)$(call generate_pcfile,$*,$@,$(call get_cont,CONTRIB_INCDIR,$*),$(call get_cont,PC_LIBS,$*),$(call get_cont,REQUIRES_LIBS,$*))
all:: $(PC_FILES)
TARGET_E_A := $(TARGET)_e.a
PC_FILENAMES := $(PC_FILENAME) $(PC_FILENAME)_e
-PC_LIBS_$(PC_FILENAME) := $(TARGET_A)
-PC_LIBS_$(PC_FILENAME)_e := $(TARGET_E_A)
+PC_LIBS_$(PC_FILENAME) := -l$(patsubst lib%,%,$(TARGET))
+PC_LIBS_$(PC_FILENAME)_e := -l$(patsubst lib%,%,$(TARGET))_e
CXXFLAGS_amd64-l4f += -mcmodel=medium
CFLAGS_amd64-l4f += -mcmodel=medium
PC_FILENAME = dde-linux26
PC_FILENAMES := $(PC_FILENAME) $(PC_FILENAME)_net $(PC_FILENAME)_block $(PC_FILENAME)_char
-PC_LIBS_$(PC_FILENAME) := $(TARGET_DDE)
-PC_LIBS_$(PC_FILENAME)_net := $(TARGET_DDE_NET)
-PC_LIBS_$(PC_FILENAME)_block := $(TARGET_DDE_BLOCK)
-PC_LIBS_$(PC_FILENAME)_sound := $(TARGET_DDE_SOUND)
-PC_LIBS_$(PC_FILENAME)_char := $(TARGET_DDE_CHAR)
+PC_LIBS_$(PC_FILENAME) := $(patsubst lib%.a,-l%,$(TARGET_DDE))
+PC_LIBS_$(PC_FILENAME)_net := $(patsubst lib%.a,-l%,$(TARGET_DDE_NET))
+PC_LIBS_$(PC_FILENAME)_block := $(patsubst lib%.a,-l%,$(TARGET_DDE_BLOCK))
+PC_LIBS_$(PC_FILENAME)_sound := $(patsubst lib%.a,-l%,$(TARGET_DDE_SOUND))
+PC_LIBS_$(PC_FILENAME)_char := $(patsubst lib%.a,-l%,$(TARGET_DDE_CHAR))
TARGET = $(TARGET_DDE) $(TARGET_DDE_NET) $(TARGET_DDE_BLOCK) $(TARGET_DDE_SOUND) $(TARGET_DDE_CHAR)
LINK_INCR = $(TARGET_DDE) $(TARGET_DDE_BLOCK)
* bad things. Because of this the region is always reserved on such boxes.
*/
#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) && !defined(CONFIG_PPC64)
- if (!request_region(I8042_DATA_REG, 16, "i8042"))
+ //l4/if (!request_region(I8042_DATA_REG, 16, "i8042"))
+ if (!request_region(I8042_DATA_REG, 1, "i8042"))
+ return -1;
+ if (!request_region(I8042_COMMAND_REG, 1, "i8042"))
return -1;
#endif
Addr end() const { return _d.end(); }
Size size() const { return _d.size(); }
+ bool contains(Adr_resource const &o) const
+ { return start() <= o.start() && end() >= o.end(); }
+
bool valid() const { return flags() && _d.start() <= _d.end(); }
void start(Addr start) { _d.start(start); }
}
#endif
- if (i == _resources.end())
+ if (i == _resources.end() || !(*i)->contains(ires))
return -L4_ENOENT;
#if 0
#include "boot_fs.h"
#include "dataspace_static.h"
+#include "page_alloc.h"
#include "globals.h"
#include "name_space.h"
#include "debug.h"
//dump_mbi(mbi);
+ unsigned dirinfo_space = L4_PAGESIZE;
+ char *dirinfo = (char *)Single_page_alloc_base::_alloc(dirinfo_space, L4_PAGESHIFT);
+ unsigned dirinfo_size = 0;
+
l4util_mb_mod_t const *modules = (l4util_mb_mod_t const *)mbi->mods_addr;
unsigned num_modules = mbi->mods_count;
for (unsigned mod = 3; mod < num_modules; ++mod)
object = object_pool.cap_alloc()->alloc(rf);
rom_ns.register_obj(name, Names::Obj(0, rf));
+ do
+ {
+ unsigned left = dirinfo_space - dirinfo_size;
+ unsigned written = snprintf(dirinfo + dirinfo_size, left, "%d:%.*s\n",
+ name.len(), name.len(), name.start());
+ if (written > left)
+ {
+ char *n = (char *)Single_page_alloc_base::_alloc(dirinfo_space + L4_PAGESIZE,
+ L4_PAGESHIFT);
+ memcpy(n, dirinfo, dirinfo_space);
+ Single_page_alloc_base::_free(dirinfo, dirinfo_space, true);
+ dirinfo = n;
+ dirinfo_space += L4_PAGESIZE;
+ }
+ else
+ {
+ dirinfo_size += written;
+ break;
+ }
+ }
+ while (1);
+
+
L4::cout << " BOOTFS: [" << (void*)modules[mod].mod_start << "-"
<< (void*)end << "] " << object << " "
<< name << "\n";
}
+
+ Moe::Dataspace_static *dirinfods;
+ dirinfods = new Moe::Dataspace_static((void *)dirinfo,
+ dirinfo_size,
+ Dataspace::Read_only);
+
+ object_pool.cap_alloc()->alloc(dirinfods);
+ rom_ns.register_obj(".dirinfo", Names::Obj(0, dirinfods));
}
App_model::App_model()
: _task(0)
{
- enum
- {
- Kip_address = 0xa0000000,
- Utcb_area_start = 0xb3000000,
- Default_max_threads = 16,
- };
// set default values for utcb area, values may be changed by loader
- _info.utcbs_start = Utcb_area_start;
+ _info.utcbs_start = Utcb_area_start;
_info.utcbs_log2size = l4util_log2(Default_max_threads * L4_UTCB_OFFSET);
// set default values for the application stack
_info.kip = Kip_address;
-
}
App_model::init_prog()
{
- enum
- {
- Utcb_area_start = 0xb3000000,
- Default_max_threads = 16,
- Total_max_threads = 256,
- };
-
-
push_argv_strings();
push_env_strings();
Dbg info(Dbg::Info);
Default_max_prio = 0xff,
};
+ enum
+ {
+ Utcb_area_start = 0xb3000000,
+ Default_max_threads = 16,
+ Total_max_threads = 256,
+ Kip_address = 0xa0000000,
+ };
+
typedef L4Re::Util::Ref_cap<L4Re::Dataspace>::Cap Const_dataspace;
typedef L4Re::Util::Ref_cap<L4Re::Dataspace>::Cap Dataspace;
typedef L4Re::Util::Ref_cap<L4Re::Rm>::Cap Rm;
{
public:
explicit
- Err(Level l = Normal) : L4Re::Util::Err(l, "Ldr") {}
+ Err(Level l = Normal) : L4Re::Util::Err(l, "Ned") {}
};
class Dbg : public L4Re::Util::Dbg
explicit
Dbg(unsigned long mask, char const *subs = 0)
- : L4Re::Util::Dbg(mask, "Ldr", subs)
+ : L4Re::Util::Dbg(mask, "Ned", subs)
{}
};
#include <l4/cxx/auto_ptr>
#include <l4/cxx/ref_ptr>
#include <l4/libloader/elf>
+#include <l4/util/bitops.h>
#include <lua.h>
#include <lauxlib.h>
prog_info()->ldr_flags = _cfg_integer("ldr_flags", prog_info()->ldr_flags);
prog_info()->l4re_dbg = _cfg_integer("l4re_dbg", prog_info()->l4re_dbg);
+ unsigned max_num_threads = _cfg_integer("max_threads", Default_max_threads);
+ if (max_num_threads > Total_max_threads)
+ {
+ Dbg warn(Dbg::Warn);
+ warn.printf("Warning: Limiting number of thread per task to %d\n", Total_max_threads);
+ max_num_threads = Total_max_threads;
+ }
+ prog_info()->utcbs_log2size
+ = l4util_log2(l4util_next_power2(max_num_threads) * L4_UTCB_OFFSET);
+
_cfg_cap("log", &prog_info()->log);
_cfg_cap("mem", &prog_info()->mem_alloc);
_cfg_cap("factory", &prog_info()->factory);
SYSTEMS = x86 arm amd64 ppc32
TARGET = libuc_c.a libuc_c.so
+PC_LIBS = -luc_c
LDFLAGS = -z combreloc -z relro --sort-common \
--sort-section alignment --warn-common \
--warn-once
SRC_S_libuc_c.a := $(BOTH_SRC_S)
SRC_S_libuc_c.so := $(BOTH_SRC_S)
-IDL_PATH =
-PRIVATE_INCDIR = $(SRC_DIR)/ARCH-$(ARCH)/include $(SRC_DIR)/ARCH-all/include \
+private_incdirs = $(SRC_DIR)/ARCH-$(ARCH)/include $(SRC_DIR)/ARCH-all/include \
$(OBJ_DIR)/ARCH-$(ARCH)/include $(OBJ_DIR)/ARCH-all/include \
$(OBJ_DIR)/ARCH-all/libc/string \
$(SRC_DIR)/../contrib/uclibc/libc/misc/internals \
- $(OBJ_BASE)/include/$(ARCH) $(OBJ_BASE)/include \
+ $(if $(1),$(OBJ_BASE)/include/$(ARCH)/$(L4API)) \
+ $(OBJ_BASE)/include/$(ARCH) \
+ $(OBJ_BASE)/include \
$(OBJ_BASE)/include/uclibc \
$(SRC_DIR)/../contrib/uclibc/libcrypt
+
+PRIVATE_INCDIR = $(call private_incdirs)
LIBCINCDIR = $(addprefix -I,$(GCCINCDIR))
CPPFLAGS += -nostdinc -include \
$(OBJ_DIR)/ARCH-all/include/libc-symbols.h
-I$(SRC_DIR)/../contrib/uclibc/ldso/include
CPPFLAGS_$(OBJ_DIR)/ARCH-all/libc/inet += -DRESOLVER="\"resolv.c\""
+PRIVATE_INCDIR_ARCH-all/libc/string/wcslen.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+PRIVATE_INCDIR_ARCH-all/libc/string/wcslen.s.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+PRIVATE_INCDIR_ARCH-all/libc/string/wcsnlen.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+PRIVATE_INCDIR_ARCH-all/libc/string/wcsnlen.s.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+PRIVATE_INCDIR_ARCH-all/libc/string/wmemcpy.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+PRIVATE_INCDIR_ARCH-all/libc/string/wmemcpy.s.o = $(SRC_DIR)/../contrib/uclibc/libc/string
+
ifneq ($(L4API),)
DEFINES += -DL4_THREAD_SAFE
-TARGET = r/libuc_c.a r/libuc_c.so
LDFLAGS_r/libuc_c.so := $(LDFLAGS_libuc_c.so)
SRC_C_r/libuc_c.a := $(SRC_C_libuc_c.a)
SRC_C_r/libuc_c.so := $(SRC_C_libuc_c.so) libpthread/src/forward.c
SRC_CC_r/libuc_c.so := $(SRC_CC_libuc_c.so)
SRC_S_r/libuc_c.a := $(SRC_S_libuc_c.a)
SRC_S_r/libuc_c.so := $(SRC_S_libuc_c.so)
-PRIVATE_INCDIR = $(SRC_DIR)/ARCH-$(ARCH)/include $(SRC_DIR)/ARCH-all/include \
- $(OBJ_DIR)/ARCH-$(ARCH)/include $(OBJ_DIR)/ARCH-all/include \
- $(SRC_DIR)/../contrib/uclibc/libc/misc/internals \
- $(OBJ_DIR)/ARCH-all/libc/string \
- $(OBJ_BASE)/include/$(ARCH)/$(L4API) \
- $(OBJ_BASE)/include/$(ARCH) $(OBJ_BASE)/include \
- $(OBJ_BASE)/include/uclibc_pthreads \
- $(OBJ_BASE)/include/uclibc \
- $(SRC_DIR)/../contrib/uclibc/libcrypt
+PRIVATE_INCDIR = $(call private_incdirs,1)
vpath libpthread/src/forward.c $(PTHLIB_DIR)/..
PRIVATE_INCDIR_libpthread/src/forward.s.o += $(PTHLIB_DIR)/src/sysdeps/$(UCLIBC_ARCH_$(ARCH)) \
$(PTHLIB_DIR)/src
libc/stdio/_trans2w.c
libc/stdio/_uintmaxtostr.c
libc/stdio/_wcommit.c
+libc/stdio/_wfwrite.c
libc/stdio/asprintf.c
libc/stdio/clearerr.c
libc/stdio/clearerr.c clearerr__DO_UNLOCKED
libc/stdio/fputs.c fputs__DO_UNLOCKED
libc/stdio/fputc.c
libc/stdio/fputc.c fputc__DO_UNLOCKED
+libc/stdio/fputws.c
+libc/stdio/fputws.c fputws__DO_UNLOCKED
libc/stdio/fprintf.c
libc/stdio/fread.c
libc/stdio/fread.c fread__DO_UNLOCKED
libc/stdio/ftello.c
libc/stdio/ftello64.c
libc/stdio/funlockfile.c
+libc/stdio/fwprintf.c
libc/stdio/fwrite.c
libc/stdio/fwrite.c fwrite__DO_UNLOCKED
libc/stdio/getdelim.c
libc/stdio/setlinebuf.c
libc/stdio/snprintf.c
libc/stdio/sprintf.c
+libc/stdio/swprintf.c
libc/stdio/ungetc.c
libc/stdio/vasprintf.c
libc/stdio/vdprintf.c
libc/stdio/_vfprintf.c
libc/stdio/_vfprintf_internal.c
+libc/stdio/_vfwprintf_internal.c
libc/stdio/vfprintf.c
+libc/stdio/vfwprintf.c
libc/stdio/_ppfs_init.c
libc/stdio/_ppfs_prepargs.c
libc/stdio/_ppfs_setargs.c
libc/stdio/_ppfs_parsespec.c
libc/stdio/vsnprintf.c
libc/stdio/vsprintf.c
+libc/stdio/vswprintf.c
libc/stdio/vprintf.c
+libc/stdio/vwprintf.c
+libc/stdio/wprintf.c
libc/string/_string.h
libc/string/_syserrmsg.h
libc/string/basename.c
libc/string/strndup.c
libc/string/strncasecmp.c
libc/string/strtok.c
+libc/string/wcsnlen.c
+libc/string/wcslen.c
+libc/string/wmemcpy.c
libc/misc/assert/__assert.c
libc/misc/ctype/ctype.c
libc/misc/ctype/isalnum.c
$(VERBOSE)cp $(SRC_DIR)/../contrib/libudis86/types.h $(OBJ_DIR)/libudis86
$(VERBOSE)cp $(OBJ_DIR)/itab.h $(OBJ_DIR)/libudis86
+# PYTHONPATH=$(CONTRIB_PATH)/scripts python -B would be enough instead of
+# linking the contrib files but the -B option is only available from python
+# 2.6 onwards
$(OBJ_DIR)/itab.h $(OBJ_DIR)/itab.c:
- cd $(OBJ_DIR) && PYTHONPATH=$(CONTRIB_PATH)/scripts python \
+ for p in $(CONTRIB_PATH)/scripts/*.py; do ln -sf $$p $(OBJ_DIR); done
+ cd $(OBJ_DIR) && PYTHONPATH=$(OBJ_DIR) python \
$(CONTRIB_PATH)/libudis86/itab.py \
$(CONTRIB_PATH)/docs/x86/optable.xml
projects / l4.git / commitdiff