clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation

Return the actually achieved rate in cfg->output_rate rather than just the
requested rate. This is important to make clk_round_rate return the correct
result.

Change-Id: I1991b6de49cec9df74c423118cb1b3398f844f0b
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1227689
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index f1b114d8623987939a644ebc242231b2645e8937..1e3940fe1c1221021e7bb3a2aee98352b142542b 100644 (file)
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -1293,6 +1293,7 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
        cfg->n = p_rate / cf;
 
        cfg->sdm_data = 0;
+       cfg->output_rate = input_rate;
        if (params->sdm_ctrl_reg) {
                unsigned long rem = p_rate - cf * cfg->n;
                /* If ssc is enabled SDM enabled as well, even for integer n */
@@ -1303,10 +1304,15 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
                        s -= PLL_SDM_COEFF / 2;
                        cfg->sdm_data = sdin_din_to_data(s);
                }
+               cfg->output_rate *= cfg->n * PLL_SDM_COEFF +PLL_SDM_COEFF/2 +
+                                       sdin_data_to_din(cfg->sdm_data);
+               cfg->output_rate /= p * cfg->m * PLL_SDM_COEFF;
+       } else {
+               cfg->output_rate *= cfg->n;
+               cfg->output_rate /= p * cfg->m;
        }
 
        cfg->input_rate = input_rate;
-       cfg->output_rate = rate;
 
        return 0;
 }