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microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / ip / servo_led_ps2_1.0 / hdl / servo_led_ps2_v1_0_S00_AXI.vhd
2017-02-14 Pavel Pisamicrozed_apo: Servo outputs aequipped by PWM generators... blob | commitdiff | raw
2017-01-24 Pavel Pisamicrozed_apo: IP skeleton of servo with alternative... blob | commitdiff | raw | diff to current
CAN benchmark FPGA design and software for MicroZed board