]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip/dcsimpledrv_to_pmod12_pins/xgui/dcsimpledrv_to_pmod12_pins_v1_0.tcl
dcsimpledrv: add component for mapping FPGA_IO/PMOD1 and PMOD2 signals to dcsimpledrv.
[fpga/zynq/canbench-sw.git] / system / ip / dcsimpledrv_to_pmod12_pins / xgui / dcsimpledrv_to_pmod12_pins_v1_0.tcl
2017-07-25 Pavel Pisadcsimpledrv: add component for mapping FPGA_IO/PMOD1...