]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - petalinux
projects / fpga / zynq / canbench-sw.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
sja1000: synchronous with AXI, duplex register access (WIP)
[fpga/zynq/canbench-sw.git] / petalinux /
2016-05-12 Martin Jerabekremoved generated file tree | commitdiff
2016-05-12 Martin Jerabeksja1000 core, linux drivers tree | commitdiff
2016-05-12 Martin Jerabekbitstream file renamed tree | commitdiff
2016-05-03 Martin Jerabekpetalinux: mc & talloc fix tree | commitdiff
2016-05-03 Martin Jerabekpetalinux: added Midnight Commander tree | commitdiff
2016-05-03 Martin Jerabekpetalinux: fixed booting stuff tree | commitdiff
2016-03-30 Martin JerabekMakefile fixes tree | commitdiff
2016-03-30 Martin Jerabekupdated bootscript, added "How to build" to README.txt tree | commitdiff
2016-03-30 Martin Jerabekpetalinux: added canutils, dropbear (SSH server), libs tree | commitdiff
2016-03-30 Martin Jerabekpetalinux: Boot from network (TFTP), NFS root; support... tree | commitdiff
2016-03-30 Martin JerabekAdded latester (sources in submodule) and dependencies... tree | commitdiff
2016-03-30 Martin JerabekAdded patched xilinx_can module, canhwtstamp testing app tree | commitdiff
2016-03-30 Martin Jerabekadded system and petalinux configuration, scripts,... tree | commitdiff
CAN benchmark FPGA design and software for MicroZed board