]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/commitdiff
AXI PWM Coprocessor: minor correction and formatting.
authorPavel Pisa <pisa@cmp.felk.cvut.cz>
Fri, 20 May 2016 17:10:33 +0000 (19:10 +0200)
committerPavel Pisa <pisa@cmp.felk.cvut.cz>
Mon, 16 Jan 2017 16:57:20 +0000 (17:57 +0100)
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd
system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_S00_AXI.vhd

index 5e2136934cdffd546ecc07e7e752e85b29a50df0..c038f89d3e89c1fbb1bd7c90902fa2b3bb60cdd5 100644 (file)
@@ -212,7 +212,7 @@ begin
        M_AXI_AWADDR    <= pwm_wr_addr;
        --AXI 4 write data
        M_AXI_WDATA     <= pwm_wr1 when (pwm_state_inpr = "01")
-                 else pwm_wr2 when (pwm_state_inpr = "01")
+                 else pwm_wr2 when (pwm_state_inpr = "10")
                  else pwm_wr0;
 
        M_AXI_AWPROT    <= "000";
@@ -245,7 +245,7 @@ begin
                INIT_AXI_TXN <= '0';
              else
                INIT_AXI_TXN <= '1';
-               pwm_state_inpr <= pwm_state_inpr;
+               pwm_state_inpr <= pwm_state_i;
              end if;
            end if;
          end if;
index bf1deaf710903e30271d05bc2d54077c168227b9..f024e71c60cf51c27b89c9cf3be2dab0c7f76aec 100644 (file)
@@ -237,46 +237,46 @@ begin
              slv_reg5 <= (others => '0');
              slv_reg6 <= (others => '0');
              slv_reg7 <= (others => '0');
-          pwm_state <= "00";
-          pwm_enabled <= '0';
+             pwm_state <= "00";
+             pwm_enabled <= '0';
            else
              pwm_per := to_integer(unsigned(slv_reg0(PWM_BITS - 1 downto 0)));
              pwm_val := to_integer(unsigned(slv_reg1(PWM_BITS - 1 downto 0)));
              pwm_cnt := to_integer(unsigned(slv_reg2(PWM_BITS - 1 downto 0)));
 
-          pwm_wr_addr <= slv_reg3;
+             pwm_wr_addr <= slv_reg3;
              pwm_wr0 <= slv_reg4;
              pwm_wr1 <= slv_reg5;
              pwm_wr2 <= slv_reg6;
 
              slv_reg0 <= slv_reg0;
-          slv_reg1 <= slv_reg1;
-          slv_reg2 <= slv_reg2;
-          slv_reg3 <= slv_reg3;
-          slv_reg4 <= slv_reg4;
-          slv_reg5 <= slv_reg5;
-          slv_reg6 <= slv_reg6;
-          slv_reg7 <= slv_reg7;
-
-          if (slv_reg0(31) = '0') then -- The most significant bit of the period enables PWM
-            pwm_state <= "00";
-            pwm_enabled <= '0';
-            slv_reg2(PWM_BITS - 1 downto 0) <= (others => '0');
-          else
-            pwm_enabled <= '1';
-            if pwm_cnt >= pwm_per then
-              slv_reg2(PWM_BITS - 1 downto 0) <= std_logic_vector(to_unsigned(0, PWM_BITS));
-            else
-              slv_reg2(PWM_BITS - 1 downto 0) <= std_logic_vector(to_unsigned(pwm_cnt + 1, PWM_BITS));
-            end if;
-            if (pwm_cnt >= pwm_val) then
-              pwm_state <= "00";
-            elsif pwm_cnt = 0 then
-              pwm_state <= slv_reg1(31 downto 30); -- Two MSB bits of the PWM value controls direction
-            else
-              pwm_state <= pwm_state;
-            end if;
-          end if;
+             slv_reg1 <= slv_reg1;
+             slv_reg2 <= slv_reg2;
+             slv_reg3 <= slv_reg3;
+             slv_reg4 <= slv_reg4;
+             slv_reg5 <= slv_reg5;
+             slv_reg6 <= slv_reg6;
+             slv_reg7 <= slv_reg7;
+
+             if (slv_reg0(31) = '0') then -- The most significant bit of the period enables PWM
+               pwm_state <= "00";
+               pwm_enabled <= '0';
+               slv_reg2(PWM_BITS - 1 downto 0) <= (others => '0');
+             else
+               pwm_enabled <= '1';
+               if pwm_cnt >= pwm_per then
+                 slv_reg2(PWM_BITS - 1 downto 0) <= std_logic_vector(to_unsigned(0, PWM_BITS));
+               else
+                 slv_reg2(PWM_BITS - 1 downto 0) <= std_logic_vector(to_unsigned(pwm_cnt + 1, PWM_BITS));
+               end if;
+               if (pwm_cnt >= pwm_val) then
+                 pwm_state <= "00";
+               elsif pwm_cnt = 0 then
+                 pwm_state <= slv_reg1(31 downto 30); -- Two MSB bits of the PWM value controls direction
+               else
+                 pwm_state <= pwm_state;
+               end if;
+             end if;
 
              loc_addr := axi_awaddr(ADDR_LSB + OPT_MEM_ADDR_BITS downto ADDR_LSB);
              if (slv_reg_wren = '1') then