Replace dcsimpledrv_to_pmod12_pins with direct connection to PMOD pins

Replace dcsimpledrv_to_pmod12_pins with direct connection to PMOD pins

This change allows us to get rid of the following synthesis
error (tested in Vivado 2017.3 and 2019.1):

    [Designutils 20-1595] In entity
        top_dcsimpledrv_to_pmod12_pins_0_0, connectivity of net PWM1_A
        cannot be represented in VHDL. VHDL lacks syntax to connect
        the following inout terminals to a differently-named net:
            inout FPGA_IO_C[39]

    Resolution: Check whether terminals really need inout direction
    and substitute input or output as needed. It may also be possible
    to rename the net to match the terminal.