]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/commit
microzed_apo: 16 bit bus LCD: Add register bit for program initiated reset.
authorPavel Pisa <pisa@cmp.felk.cvut.cz>
Tue, 14 Feb 2017 16:29:53 +0000 (17:29 +0100)
committerPavel Pisa <pisa@cmp.felk.cvut.cz>
Tue, 14 Feb 2017 16:29:53 +0000 (17:29 +0100)
commit1e886a5e597fca18d868b3a4ad2fe74446fc05d7
tree8bd265a55970dfb87bcd8de4d1bac951f9689964
parenta77931eb6d20e22238a529872264aa56e2576e8e
microzed_apo: 16 bit bus LCD: Add register bit for program initiated reset.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0.vhd
system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd