microzed_apo: 16 bit bus LCD: Add register bit for program initiated reset.

[fpga/zynq/canbench-sw.git] / system / ip / display_16bit_cmd_data_bus_1.0 / hdl / display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd

diff --git a/system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd b/system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd
index 182a83c0e4ad55c63520dd6ff0730483b0c31582..3acfd541680bf13637542678e9aa760696e865a3 100644 (file)
--- a/system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd
+++ b/system/ip/display_16bit_cmd_data_bus_1.0/hdl/display_16bit_cmd_data_bus_v1_0_S00_AXI.vhd
@@ -86,7 +86,9 @@ entity display_16bit_cmd_data_bus_v1_0_S00_AXI is
 
                trasfer_rq      : out std_logic;
                trasfer_rq_dbl  : out std_logic;
-               ready_for_rq    : in std_logic
+               ready_for_rq    : in std_logic;
+
+               lcd_reset_bit   : out std_logic
        );
 end display_16bit_cmd_data_bus_v1_0_S00_AXI;
 
@@ -563,7 +565,7 @@ begin
 
 
        -- Add user logic here
-
+       lcd_reset_bit <= slv_reg0(1);
        -- User logic ends
 
 end arch_imp;