| 2016-05-27 |
Martin Jerabek | schemaric: formatting, comments; board definition file... master |
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| 2016-04-25 |
Martin Jerabek | changed diode footprints, added text to bottom layer |
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| 2016-04-21 |
Martin Jerabek | layout: connectors, KEYs; added ESD protection |
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| 2016-04-20 |
Martin Jerabek | layout: CAN, user LEDs, KEYs, SWs, JX2 |
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| 2016-04-12 |
Martin Jerabek | footprints positioned, better D-SUB footprints, fixes |
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| 2016-04-12 |
Martin Jerabek | user leds: transistors replaced by 4-channel XOR gates |
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| 2016-04-11 |
Martin Jerabek | optional common CAN termination, debouncing capacitors... |
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| 2016-04-10 |
Martin Jerabek | power: LM2676, VCCIO reg FB divider changed, footprints... |
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| 2016-04-10 |
Martin Jerabek | power: used TPS2260DDC, added choke footprints |
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| 2016-04-10 |
Martin Jerabek | power reg changed, I/O pin assignment, testpoints, CAN |
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| 2016-04-05 |
Martin Jerabek | CAN termination & merging redesigned, added connectors... |
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| 2016-03-15 |
Martin Jerabek | Used MicroHeaders from kicad-parts |
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| 2016-03-15 |
Martin Jerabek | Added LEDs, buttons, DC connector. |
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| 2016-03-15 |
Martin Jerabek | Separated to hierarchical sheets. |
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projects / fpga / zynq / canbench-hw.git / history