]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - lib/JX1.lib
optional common CAN termination, debouncing capacitors only 10nF, footprints
[fpga/zynq/canbench-hw.git] / lib / JX1.lib
2016-04-10 Martin Jerabekpower reg changed, I/O pin assignment, testpoints, CAN