1 # TOP - Name of the top-level module
2 # DEVICE - Name of the FPGA device (device-package-speed)
3 # PRJ - Name of .prj file with names of all source files. See XST manual.
4 # UCF - Name of the user constraints file
5 # BMM - If design contains initialized memories, softcore MCU, etc., this
6 # file describes mapping of .elf file to these memories. Only one
7 # .bmm file can be used.
8 # SEARCH_DIRS - Directories to search when searching for netlists (.ngc, ...).
10 # JTAG_POS - Position of device in JTAG chain. Used when downloading bit stream.
11 # INTSTYLE - Style of screen output. (ise | xflow | silent)
12 # SRC - Path to the source directory. All other paths are relative to this.
14 # Makefile is interconnected with Ocera-makefile system by the following properties
17 # APP - application name
18 # SW_SRC - directory name within $(SRC) dir where OC-makefile is called.
19 # By default it's software/$(ARCH)-$(BOARD)-$(APP)
20 # ELF - File containing initialization data of memories described by
21 # previously defined .bmm file. Format can be .elf or .mem.
24 # Targets desctiption:
25 # - synthesize : Synthesize all VHDL and Verilog source files, libraries, etc.
26 # defined in PRJ files and produces NGC file.
27 # - translate : Translate all netlist files (.ngc, ...) into the NGD file,
28 # where the design is described in terms of deneral logic elements
29 # such as (RAM, flip-flop, XOR, ...).
30 # - map : Map the general logic from NGD file to the components in the
31 # target FPGA and produces NCD_MAP file.
32 # - par : PAR stands for Plase & Route. This procedure takes NCD_MAP file,
33 # places all components and makes routes between them (depending
34 # on the chosen optimization mode) and produces NCD file.
35 # - implement : Transfer placed and routed NCD file into the bit file, which can
36 # be then used to configure particular FPGA. When ELF and BMM is
37 # specified, this procedure fills in location constraints of all
38 # memories in BMM and initialize them with data from ELF.
39 # - download : Download bitfile to the target FPGA (by using Impact).
40 # - clean : Clean build directory, dependency (*.d) files and call
41 # 'make clean' in the directory of ELF file.
42 # - all : Do 'clean' and 'implement' targets.
44 # Dependicies are handled, so in most cases only 'download' target is called.
48 DEVICE = xc2v1000-fg456
58 SW_SRC = software/$(ARCH)-$(BOARD)-$(APP)
59 ELF = $(SW_SRC)/_compiled/bin/$(APP)
68 #===============================================================================
69 # Abbreviations of frequently used file names.
71 ifneq ($(strip $(APP)),)
72 BITFILE = $(TOP)_elf.bit
77 BMM_LOCAL = $(notdir $(BMM))
78 BMM_LOCAL_BD = $(basename $(BMM_LOCAL))_bd$(suffix $(BMM))
83 NCD_MAP = $(TOP)_map.ncd
86 #===============================================================================
88 .PHONY: all synthesize translate map par implement download download-only clean
89 .PHONY: re-synthesize re-translate re-map re-par
95 #===============================================================================
98 re-synthesize $(NGC): $(addprefix $(SRC)/,$(PRJ))
101 $(addprefix -ifn $(SRC)/,$(PRJ)) \
108 -keep_hierarchy soft \
109 -opt_level 1" | xst | tee xst.log
113 re-translate $(NGD): $(NGC) $(SRC)/$(BMM) $(SRC)/$(UCF)
114 ifneq ($(strip $(BMM)),)
115 ln -s -f $(SRC)/$(BMM) $(BMM_LOCAL)
117 ngdbuild -intstyle $(INTSTYLE) -p $(DEVICE) -uc $(SRC)/$(UCF) \
118 $(addprefix -bm ,$(BMM_LOCAL)) \
119 $(addprefix -sd $(SRC)/,$(SEARCH_DIRS)) \
123 map: $(NCD_MAP) $(PCF)
124 re-map $(NCD_MAP) $(PCF): $(NGD)
125 map -intstyle $(INTSTYLE) -o $(NCD_MAP) $(NGD) $(PCF)
128 re-par $(NCD): $(NCD_MAP) $(PCF)
129 par -intstyle $(INTSTYLE) $(NCD_MAP) -w $(NCD) $(PCF)
131 $(TOP).bit $(BMM_LOCAL_BD): $(NCD)
132 bitgen -w $(NCD) $(TOP).bit $(PCF)
134 $(TOP)_elf.bit: $(TOP).bit $(BMM_LOCAL_BD) $(SRC)/$(ELF)
135 data2mem -bm $(BMM_LOCAL_BD) -bd $(SRC)/$(ELF) -bt $(TOP).bit -o b $(TOP)_elf.bit
137 .PHONY: $(SRC)/$(ELF)
139 make -C $(SRC)/$(SW_SRC)
140 ln -sf $(notdir $(ELF)) $(SRC)/$(ELF).elf
142 download: $(BITFILE) download-only
147 setCable -port auto \n\
149 assignFile -p $(JTAG_POS) -file $(BITFILE) \n\
150 program -p $(JTAG_POS) \n\
151 exit" | impact -batch
153 #===============================================================================
156 ls | grep -v ^Makefile$$ | xargs rm -rf
157 rm -f $(addprefix $(SRC)/,$(PRJ:.prj=.d))
158 make -C $(SRC)/$(SW_SRC) distclean
160 #===============================================================================
168 -include $(addprefix $(SRC)/,$(PRJ:.prj=.d))
170 #===============================================================================
174 -e 's/[ \t][ \t]*/ /g' \
175 -e 's/^ //' -e 's/ $$//' \
178 -e 's|\(.*\) \(.*\) \(.*\)|$<: $(dir $<)\3\n$(dir $<)\3:\n|' \