msp_motion.prj

   1 #==============================================================================#
   2 # OpenMSP430 softcore MCU module                                               #
   3 #==============================================================================#
   4
   5 verilog work openmsp430/core/omsp_alu.v
   6 verilog work openmsp430/core/omsp_clock_module.v
   7 verilog work openmsp430/core/omsp_dbg.v
   8 verilog work openmsp430/core/omsp_dbg_hwbrk.v
   9 verilog work openmsp430/core/omsp_dbg_uart.v
  10 verilog work openmsp430/core/omsp_execution_unit.v
  11 verilog work openmsp430/core/omsp_frontend.v
  12 verilog work openmsp430/core/omsp_mem_backbone.v
  13 verilog work openmsp430/core/omsp_multiplier.v
  14 verilog work openmsp430/core/omsp_register_file.v
  15 verilog work openmsp430/core/omsp_sfr.v
  16 verilog work openmsp430/core/omsp_watchdog.v
  17 verilog work openmsp430/core/openMSP430.v
  18
  19 verilog work openmsp430/core/openMSP430_undefines.v
  20 verilog work openmsp430/core/timescale.v
  21
  22 vhdl    work openmsp430/memory/ram_generic.vhd
  23
  24 vhdl    work openmsp430/uart/tx_control.vhd
  25 vhdl    work openmsp430/uart/tx.vhd
  26 vhdl    work openmsp430/uart/rx_control.vhd
  27 vhdl    work openmsp430/uart/rx.vhd
  28 vhdl    work openmsp430/uart/fifo.vhd
  29 vhdl    work openmsp430/uart/baud_gen.vhd
  30 vhdl    work openmsp430/uart/uart.vhd
  31
  32 verilog work openmsp430/top/top_8_32_mul_dbus/openMSP430_defines.v
  33 vhdl    work openmsp430/top/top_8_32_mul_dbus/openMSP430_8_32_mul_dbus.vhd
  34
  35
  36 #==============================================================================#
  37 # Top-level design file                                                        #
  38 #==============================================================================#
  39
  40 vhdl    work msp_motion.vhd
  41