Added UNTESTED version of spi-commands-lost detection.

[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl

diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl
index 13ffb97cda27f6aae95c4f46c00f45b6c5100fe6..22b9f7dd2e9c2e5cd634c9a46f76fbd6fb58a3d4 100644 (file)
--- a/pmsm-control/rpi_pmsm_control.vhdl
+++ b/pmsm-control/rpi_pmsm_control.vhdl
@@ -173,6 +173,30 @@ architecture behavioral of rpi_pmsm_control is
        );
        end component;
        
+       component dff3 is
+       port(
+               clk_i   : in std_logic;
+               d_i     : in std_logic;
+               q_o     : out std_logic
+       );
+       end component;
+       
+       --resetovatelna delicka
+       component div128 is
+       port (
+               clk_in: in std_logic;
+               rst: in std_logic;
+               fail_safe: out std_logic
+       );
+       end component;
+       
+       component div256 is
+       port (
+               clk_in: in std_logic;
+               div256: out std_logic
+       );
+       end component;
+       
        
        signal adc_channels: std_logic_vector(71 downto 0);
        signal adc_m_count: std_logic_vector(8 downto 0);
@@ -217,6 +241,15 @@ architecture behavioral of rpi_pmsm_control is
        -- irc signals processing
        signal irc_i_prev: std_logic;
        
+       --filetered irc signals
+       signal irc_a_dff3: std_logic;
+       signal irc_b_dff3: std_logic;
+       
+       --16k3 clk signal
+       signal clk_16k3: std_logic;
+       --detekce prichazejicich prikazu po SPI
+       signal spi_command_lost: std_logic;
+       
        --  attribute syn_noprune of gpio2 : signal is true;
        --  attribute syn_preserve of gpio2 : signal is true;
        --  attribute syn_keep of gpio2 : signal is true;
@@ -250,8 +283,8 @@ begin
        port map (
                clock => gpio_clk,
                reset => '0',
-               a0 => irc_a,
-               b0 => irc_b,
+               a0 => irc_a_dff3,
+               b0 => irc_b_dff3,
                qcount => position,
                a_rise => open,
                a_fall => open,
@@ -294,6 +327,19 @@ begin
                q_out_o   =>clk_4M17
        );
        
+       div256_map: div256 
+       port map(
+               clk_in => clk_4M17,
+               div256 => clk_16k3
+       );
+       
+       div128_map: div128 
+       port map(
+               clk_in => clk_16k3,
+               rst => income_data_valid,
+               fail_safe => spi_command_lost
+);
+
        -- ADC needs 3.2 MHz clk when powered from +5V Vcc
        --           2.0 MHz clk when +2.7V Vcc
        -- on the input is 4.17Mhz,but this frequency is divided inside adc_reader by 2 to 2.08 Mhz,
@@ -311,6 +357,20 @@ begin
                measur_count => adc_m_count
                
        );
+       
+       dff3_a: dff3
+       port map(       
+               clk_i => gpio_clk,
+               d_i   => irc_a,
+               q_o   => irc_a_dff3 
+       );
+       
+       dff3_b: dff3
+       port map(       
+               clk_i => gpio_clk,
+               d_i   => irc_b,
+               q_o   => irc_b_dff3 
+       );
 
        dummy_unused <= gpio2 and gpio3 and
                gpio5 and gpio6 and
@@ -337,9 +397,9 @@ begin
        spi_mosi <= gpio10;
        gpio9 <= spi_miso;
 
-       pwm(1) <= pwm_sig(1) and dip_sw(1);
-       pwm(2) <= pwm_sig(2) and dip_sw(2);
-       pwm(3) <= pwm_sig(3) and dip_sw(3);
+       pwm(1) <= pwm_sig(1) and dip_sw(1) and not spi_command_lost;
+       pwm(2) <= pwm_sig(2) and dip_sw(2) and not spi_command_lost;
+       pwm(3) <= pwm_sig(3) and dip_sw(3) and not spi_command_lost;
        
                
        process