2 -- * motion-control PWM *
3 -- PWM controller with failsafe input
5 -- part of LXPWR motion control board (c) PiKRON Ltd
6 -- idea by Pavel Pisa PiKRON Ltd <ppisa@pikron.com>
7 -- code by Marek Peca <hefaistos@gmail.com>
10 -- license: GNU LGPL and GPLv3+
14 use ieee.std_logic_1164.all;
15 use ieee.numeric_std.all;
19 pwm_width: natural := 12
22 -- reset: in std_logic;
24 sync: in std_logic; --flag that counter "restarts-overflows"
25 data_valid:in std_logic; --indicates data is consistent
26 failsafe: in std_logic; --failmode turn off both transistors
27 en_p, en_n: in std_logic; --enable positive & enable inverse
28 match: in std_logic_vector (pwm_width-1 downto 0); --posion of counter when we swap output logic
29 count: in std_logic_vector (pwm_width-1 downto 0); --do we use external counter?
31 out_p, out_n: out std_logic --pwm outputs
35 architecture behavioral of mcpwm is
36 signal match_reg, next_match_reg: std_logic_vector (match'range);
37 signal en_p_reg, en_n_reg : std_logic; --enable positive + inverse output
38 signal next_en_p_reg, next_en_n_reg: std_logic; --enable - next value
39 signal q, next_q: std_logic; --logic value(level) of output
42 -- setting the output (q holds the logic value)
43 out_p <= q and en_p_reg and not failsafe;
44 -- out_n <= not q and en_n_reg and not failsafe; --Use this line when using "not inteligent" half-H bridge
45 out_n <= en_n_reg or failsafe; --switch off both transistors. Use this line when "inteligent" half-H bridge is at use
47 --set next values - use old or new values
48 reg: process (data_valid, failsafe, match, match_reg,
49 en_p, en_n, en_p_reg, en_n_reg)
51 --when theres no new data & failsafe is unset - use old values
52 next_match_reg <= match_reg;
53 next_en_p_reg <= en_p_reg;
54 next_en_n_reg <= en_n_reg;
56 --when failsafe is set disable both directions
57 if failsafe = '1' then --
59 -- little paranoia, costs nothing
63 --if theres no failsafe flag & data is valid, we can set next values
64 elsif data_valid = '1' then
65 next_match_reg <= match;
66 next_en_p_reg <= en_p;
67 next_en_n_reg <= en_n;
71 --swaping output logic when counter counts to match
72 rs: process (sync, count, match_reg, q) --if theres event on sync(the counter "restarts") or count
74 if count = match_reg then --when the counter counts to match, we swap the signals (~middle of duty cycle)
76 elsif sync = '1' then --syncing signal (start of duty cycle)
85 --set actual -> shift next registers
86 wait until clock'event and clock = '1';
87 match_reg <= next_match_reg;
88 en_p_reg <= next_en_p_reg;
89 en_n_reg <= next_en_n_reg;