Added ADC reset after each FPGA<->RPi transfer. ADC channels manipulation improved.
[fpga/rpi-motor-control.git] / pmsm-control / synthetize-agl.sh
1 #!/bin/sh
2
3 synplify_pro -licensetype synplifypro_actel -batch syn.tcl || exit 1
4 designer SCRIPT:par.tcl LOGFILE:par.log || exit 1