Resets changed from asynchronous to synchronous.

[fpga/pwm.git] / mcc.vhd

diff --git a/mcc.vhd b/mcc.vhd
index 156a84041bc65d2ba2185776ee5d0f146b231b4a..d0ca2d9a639f3808259b3e123bc3ccf189d45bf9 100644 (file)
--- a/mcc.vhd
+++ b/mcc.vhd
@@ -28,7 +28,7 @@ entity mcc is
     PWM3_STB_O : out std_logic;
     -- Shared memory interface
     IRF_ACK_I  : in  std_logic;
-    IRF_ADR_O  : out std_logic_vector (IRF_ADR_W-1 downto 0);
+    IRF_ADR_O  : out std_logic_vector (4 downto 0);
     IRF_DAT_I  : in  std_logic_vector (15 downto 0);
     IRF_DAT_O  : out std_logic_vector (15 downto 0);
     IRF_STB_O  : out std_logic;
@@ -146,6 +146,8 @@ begin
   PWM2_STB_O <= PWM_STB_O when PWM_SL_MUX_CODE = 1 else '0';
   PWM3_STB_O <= PWM_STB_O when PWM_SL_MUX_CODE = 2 else '0';
 
+  MCC_ACK (4) <= '1';
+
   
   mcc_master_1 : entity work.mcc_master
     generic map (