]> rtime.felk.cvut.cz Git - fpga/openmsp430.git/commit
Added samples of Coregen memories.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 12:13:19 +0000 (13:13 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 12:13:19 +0000 (13:13 +0100)
commit7a8cb70f0fb2f4a71cfe1780e4221cc4484650bb
treee93b0c586c15ea6f4d25b95f466506706b4a9696
parentd409932f4fb30534bdb8149d67b7e41d951b5d50
Added samples of Coregen memories.

Compiled files, vhdl wrappers and templates of *.bmm files are included.
memory/coregen/coregen.cgp [new file with mode: 0644]
memory/coregen/ram_8x2k.ngc [new file with mode: 0644]
memory/coregen/ram_8x2k.vhd [new file with mode: 0644]
memory/coregen/ram_8x2k.xco [new file with mode: 0644]
memory/coregen/ram_8x4k.ngc [new file with mode: 0644]
memory/coregen/ram_8x4k.vhd [new file with mode: 0644]
memory/coregen/ram_8x4k.xco [new file with mode: 0644]
memory/coregen/template.bmm [new file with mode: 0644]