]> rtime.felk.cvut.cz Git - fpga/openmsp430.git/commit
Renamed file with openMSP430 defines.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 11:59:30 +0000 (12:59 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 11:59:30 +0000 (12:59 +0100)
commitd409932f4fb30534bdb8149d67b7e41d951b5d50
treea5b53b075cbf080d3dc20c2f29df96965a0b1350
parent38b1caba096d0cf371638f5ce61763dedc770351
Renamed file with openMSP430 defines.

Defines file (memory sizes, HW mult, dbg, ...) renamed
from "openMSP430_defines.v" to "openMSP430_defines_template.v",
because it was usualy included instead of customised defines
file listed in *.prj file. And this behavioral could not be changed
with "-vlgincdir" (Verilog include directory) switch in XST.
core/openMSP430_defines_template.v [moved from core/openMSP430_defines.v with 100% similarity]