#define PXMCC_CURADC_CHANNELS 3
#include <stdint.h>
+#include "pxmcc_types.h"
#include "tumbl_addr.h"
/* k3 = math.sqrt(3) / 2 */
/* 1 / (2 * k3) * 65536 */
#define RECI16_2_K3 37837
-typedef struct pxmcc_axis_data_t {
- uint32_t ccflg;
- uint32_t pwm_dq; /* D and Q components of PWM (pwm_d << 16) | (pwm_q) & 0xffff */
- uint32_t cur_dq; /* D and Q components current (cur_d << 16) | (cur_q) & 0xffff */
- uint32_t ptindx; /* index into phase table / irc in the cycle */
- uint32_t ptirc; /* IRC count per phase table */
- uint32_t ptreci; /* Reciprocal value of ptirc * 63356 */
- uint32_t ptofs; /* offset between table and IRC counter */
- int32_t ptsin;
- int32_t ptcos;
- uint32_t ptphs;
- uint32_t pwm_cycle;
- uint32_t cur_d_cum;
- uint32_t cur_q_cum;
-
- uint32_t act_idle;
- uint32_t min_idle;
- uint32_t rx_done_sqn;
-} pxmcc_axis_data_t;
-
-typedef struct pxmcc_curadc_data_t {
- int16_t cur_val;
- uint16_t reserved1;
- uint16_t siroladc_offs;
- uint16_t siroladc_last;
-} pxmcc_curadc_data_t;
-
-pxmcc_axis_data_t pxmcc_axis[1];
-
-pxmcc_curadc_data_t pxmcc_curadc[PXMCC_CURADC_CHANNELS];
+pxmcc_data_t pxmcc_data;
void init_defvals(void)
{
void main(void)
{
uint32_t last_rx_done_sqn = 0;
- pxmcc_axis_data_t *pxmcc = pxmcc_axis;
+ pxmcc_axis_data_t *pxmcc;
+ pxmcc_data.common.fwversion = PXMCC_FWVERSION;
+ pxmcc_data.common.pwm_cycle = 2500;
+ pxmcc_data.common.min_idle = 0x7fff;
+ pxmcc = pxmcc_data.axis;
pxmcc->ccflg = 0;
pxmcc->ptindx = 0;
/*pxmcc->ptofs = *FPGA_IRC0;*/
pxmcc->ptirc = 1000;
pxmcc->ptreci = 4294967; /* (1LL<<32)*ptper/ptirc */
- pxmcc->min_idle = 0;
pxmcc->pwm_dq = 0;
- pxmcc->pwm_cycle = 2500;
- pxmcc_curadc[0].siroladc_offs = 0x0c17;
- pxmcc_curadc[1].siroladc_offs = 0x0c66;
- pxmcc_curadc[2].siroladc_offs = 0x0c66;
+ pxmcc_data.curadc[0].siroladc_offs = 0x0c17;
+ pxmcc_data.curadc[1].siroladc_offs = 0x0c66;
+ pxmcc_data.curadc[2].siroladc_offs = 0x0c66;
asm volatile("": : : "memory");
sqn = *FPGA_LX_MASTER_RX_DDIV;
idlecnt++;
} while (sqn == last_rx_done_sqn);
- pxmcc->act_idle = idlecnt;
- if (((idlecnt < pxmcc->min_idle) ||
- (pxmcc->min_idle == 0)) &&
+ pxmcc_data.common.act_idle = idlecnt;
+ if ((idlecnt < pxmcc_data.common.min_idle) &&
last_rx_done_sqn) {
- pxmcc->min_idle = idlecnt;
+ pxmcc_data.common.min_idle = idlecnt;
}
last_rx_done_sqn = sqn;
- pxmcc->rx_done_sqn = last_rx_done_sqn;
+ pxmcc_data.common.rx_done_sqn = last_rx_done_sqn;
asm volatile("": : : "memory");
}
{
int i;
- pxmcc_curadc_data_t *curadc = pxmcc_curadc;
+ pxmcc_curadc_data_t *curadc = pxmcc_data.curadc;
volatile uint32_t *siroladc = FPGA_LX_MASTER_RX_ADC0;
uint16_t val;
pwm[2] = *FPGA_LX_MASTER_TX_PWM1 & 0x3fff;
pwm[0] = *FPGA_LX_MASTER_TX_PWM2 & 0x3fff;
- cur[1] = pxmcc_curadc[0].cur_val;
- cur[2] = pxmcc_curadc[1].cur_val;
- cur[0] = pxmcc_curadc[2].cur_val;
+ cur[1] = pxmcc_data.curadc[0].cur_val;
+ cur[2] = pxmcc_data.curadc[1].cur_val;
+ cur[0] = pxmcc_data.curadc[2].cur_val;
pwm1 = pwm[0];
pwm2 = pwm[1];
#endif /*COMPUTE_PHASE_SECTOR*/
curmult_idx = (0x00102102 >> (4 * phs)) & 3;
- pwm_reci = pxmcc->pwm_cycle - pwm[curmult_idx];
- pwm_reci = (pxmcc->pwm_cycle << 16) / pwm_reci;
+ pwm_reci = pxmcc_data.common.pwm_cycle - pwm[curmult_idx];
+ pwm_reci = (pxmcc_data.common.pwm_cycle << 16) / pwm_reci;
cur[curmult_idx] = (int32_t)(pwm_reci * cur[curmult_idx]) >> 16;
cur1 = cur[0];
uint32_t pwm_reci_bits;
curmult_idx = (((u1gtu3 ^ u1gtu2) | 1) ^ u2gtu3 ^ u1gtu2) & 3;
- pwm_reci = pxmcc->pwm_cycle - pwm[curmult_idx];
+ pwm_reci = pxmcc_data.common.pwm_cycle - pwm[curmult_idx];
#if 0
pwm_reci_bits = __builtin_clzl(pwm_reci);
#else
dummy = *FPGA_FNCAPPROX_RECI;
pwm_reci = *FPGA_FNCAPPROX_RECI;
pwm_reci >>= 16;
- pwm_reci *= pxmcc->pwm_cycle;
+ pwm_reci *= pxmcc_data.common.pwm_cycle;
pwm_reci >>= 30 - pwm_reci_bits;
cur[curmult_idx] = (int32_t)(pwm_reci * cur[curmult_idx]) >> 16;
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ laboratory and medical instruments firmware
+
+ pxmcc_types.h - multi axis motion controller comprocesor
+ for FPGA tumble CPU of lx-rocon system - data types
+
+ (C) 2001-2014 by Pavel Pisa pisa@cmp.felk.cvut.cz
+ (C) 2002-2014 by PiKRON Ltd. http://www.pikron.com
+
+ This file can be used and copied according to next
+ license alternatives
+ - GPL - GNU Public License
+ - other license provided by project originators
+
+ *******************************************************************/
+
+#include <stdint.h>
+
+
+#define PXMCC_FWVERSION 0xACCE0001
+#define PXMCC_AXIS_COUNT 4
+#define PXMCC_CURADC_CHANNELS 16
+
+typedef struct pxmcc_common_data_t {
+ uint32_t fwversion;
+ uint32_t pwm_cycle;
+ uint32_t act_idle;
+ uint32_t min_idle;
+ uint32_t rx_done_sqn;
+} pxmcc_common_data_t;
+
+typedef struct pxmcc_axis_data_t {
+ uint32_t ccflg;
+ uint32_t mode;
+ uint32_t pwm_dq; /* D and Q components of PWM (pwm_d << 16) | (pwm_q) & 0xffff */
+ uint32_t cur_dq; /* D and Q components current (cur_d << 16) | (cur_q) & 0xffff */
+ uint32_t ptindx; /* index into phase table / irc in the cycle */
+ uint32_t ptirc; /* IRC count per phase table */
+ uint32_t ptreci; /* Reciprocal value of ptirc * 63356 */
+ uint32_t ptofs; /* offset between table and IRC counter */
+ int32_t ptsin;
+ int32_t ptcos;
+ uint32_t ptphs;
+ uint32_t cur_d_cum;
+ uint32_t cur_q_cum;
+ uint32_t inp_info; /* which irc to use */
+ uint32_t out_info; /* output index */
+ uint32_t pwmtx_info; /* offsets of pwm1 .. pwm4 from FPGA_LX_MASTER_TX */
+ uint16_t pwm_prew[4];
+} pxmcc_axis_data_t;
+
+typedef struct pxmcc_curadc_data_t {
+ int16_t cur_val;
+ uint16_t reserved1;
+ uint16_t siroladc_offs;
+ uint16_t siroladc_last;
+} pxmcc_curadc_data_t;
+
+typedef struct pxmcc_data_t {
+ pxmcc_common_data_t common;
+ pxmcc_axis_data_t axis[PXMCC_AXIS_COUNT];
+ pxmcc_curadc_data_t curadc[PXMCC_CURADC_CHANNELS];
+} pxmcc_data_t;
#include "appl_defs.h"
#include "appl_fpga.h"
+#include "pxmcc_types.h"
int pxmc_ptofs_from_index(pxmc_state_t *mcs, unsigned long irc,
unsigned long index_irc, int diff2err);
} else if (pxmc_rocon_rx_data_hist_mode == 1) {
int i;
uint32_t *pbuf = (uint32_t *)pxmc_rocon_rx_data_hist_buff;
+ pxmcc_data_t *mcc_data = (pxmcc_data_t *)fpga_tumbl_dmem;
+ pxmcc_axis_data_t *mcc_axis = mcc_data->axis + 0;
+ uint32_t *ptumbl = (uint32_t *)mcc_axis;
for (i = 0; i < 16; i++)
- *(pbuf++) = fpga_tumbl_dmem[i];
+ *(pbuf++) = *(ptumbl++);
pxmc_rocon_rx_data_hist_buff = pbuf;
}
#include "appl_defs.h"
#include "appl_fpga.h"
+#include "pxmcc_types.h"
int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
uint32_t irc;
uint32_t ptirc;
uint32_t ptreci;
+ uint32_t pwmtx_info;
uint64_t ull;
pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
+ volatile pxmcc_data_t *mcc_data = (pxmcc_data_t *)fpga_tumbl_dmem;
+ volatile pxmcc_axis_data_t *mcc_axis = mcc_data->axis + 0;
- fpga_tumbl_dmem[0] = 0;
+ mcc_axis->ccflg = 0;
si_skspace(&ps);
if (si_long(&ps, &pwm_d, 0) < 0)
ull = (1ULL << 32) * mcs->pxms_ptper;
ptreci = (ull + ptirc / 2) / ptirc;
- fpga_tumbl_dmem[0] = 0;
- fpga_tumbl_dmem[1] = (pwm_d << 16) | (pwm_q & 0xffff);
+ pwmtx_info = (9 << 0) | (10 << 8) | (11 << 16);
- fpga_tumbl_dmem[4] = ptirc;
- fpga_tumbl_dmem[5] = ptreci;
- fpga_tumbl_dmem[6] = ptofs;
+ mcc_axis->inp_info = mcs->pxms_inp_info;
+ mcc_axis->out_info = mcs->pxms_out_info;
+ mcc_axis->pwmtx_info = pwmtx_info;
+
+ mcc_axis->ptirc = ptirc;
+ mcc_axis->ptreci = ptreci;
+ mcc_axis->ptofs = ptofs;
+
+ mcc_axis->ccflg = 0;
+ mcc_axis->pwm_dq = (pwm_d << 16) | (pwm_q & 0xffff);
pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
- fpga_tumbl_dmem[0] = 1;
+ mcc_axis->ccflg = 1;
+
+ if (0) {
+ mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[1].ccflg = 1;
+ mcc_data->axis[2].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[2].ccflg = 1;
+ mcc_data->axis[3].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[3].ccflg = 1;
+ }
- printf("spd %ld\n",mcs->pxms_as);
+ printf("spd %ld act_idle %"PRIu32" min_idle %"PRIu32" avail %lu pwm_cycle %"PRIu32"\n",
+ mcs->pxms_as, mcc_data->common.act_idle, mcc_data->common.min_idle,
+ (mcc_data->common.pwm_cycle + 6) / 6, mcc_data->common.pwm_cycle);
+ mcc_data->common.min_idle = 0x7fff;
return 0;
}
--- /dev/null
+../../../hw/lx-rocon_firmware/pxmcc_types.h
\ No newline at end of file