clk_i : in std_logic;
rst_i : in std_logic;
clken_i : in std_logic;
+ gprf_finish_wrb_mem_i : in std_logic;
+
--
ID2GPRF_i : in ID2GPRF_Type;
MEM_WRB_i : in WRB_Type;
begin
wait until clk_i'event and clk_i = '1';
if (clken_i = '1') then
- wthru_rA_r <= not ena_rA_s;
- wthru_rB_r <= not ena_rB_s;
- wthru_rD_r <= not ena_rD_s;
+ wthru_rA_r <= not ena_rA_s and not gprf_finish_wrb_mem_i;
+ wthru_rB_r <= not ena_rB_s and not gprf_finish_wrb_mem_i;
+ wthru_rD_r <= not ena_rD_s and not gprf_finish_wrb_mem_i;
end if;
end process;
signal imem_addr_s : std_logic_vector((IMEM_ABITS_g-1) downto 0);
signal imem_data_s : std_logic_vector(31 downto 0);
signal gprf_clken_s : std_logic;
+ signal gprf_finish_wrb_mem_s : std_logic;
signal core_clken_s : std_logic;
signal pc_ctrl_s : std_logic;
signal c2dmemb_s : CORE2DMEMB_Type;
clk_i => clk_i,
rst_i => rst_i,
clken_i => gprf_really_clken_s,
+ gprf_finish_wrb_mem_i => gprf_finish_wrb_mem_s,
--
ID2GPRF_i => ID2GPRF_s,
MEM_WRB_i => MEM_WRB_s,
delay_bit_o => delay_bit_r,
-- GPRF control
gprf_clken_o => gprf_clken_s,
+ gprf_finish_wrb_mem_o => gprf_finish_wrb_mem_s,
-- exeq to fetch feedback registers
EX2IF_REG_i => EX2IF_s,
EX2IF_REG_o => EX2IF_r,