Assign next_last_address_s signal value in all cases to prevent generation of latches.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>

diff --git a/hw/lx_rocon_top.vhd b/hw/lx_rocon_top.vhd
index 7f7aa4fddb6c4296c29a37aa41e23dd4ef0468fa..1f5b1e0b95f216b4da0355a4fa2581dc29d4a834 100644 (file)
--- a/hw/lx_rocon_top.vhd
+++ b/hw/lx_rocon_top.vhd
@@ -319,7 +319,7 @@ dff_reset: dff2
 memory_bus_logic:
        process(cs0_xc_f_s, rd_f_s, last_rd_s, i_rd_s, i_rd_cycle2_s, last_i_rd_s,
                bls_f_s, last_bls_s, data_f_s, data_write_s,
-               data_o_s, last_address_s, address_f_s)
+               data_o_s, data_read_s, last_address_s, address_f_s)
        begin
                -- Defaults
                next_i_rd_s  <= '0';
@@ -342,12 +342,13 @@ memory_bus_logic:
                                if last_i_rd_s = '1' then
                                        -- Latch data we just read - they are valid in this cycle
                                        next_data_read_s <= data_o_s;
+                               else
+                                       next_data_read_s <= data_read_s;
                                end if;
-
-                               next_last_address_s <= address_f_s;
-                       -- else
+                       else
                        --      -- Not reading, anything goes
                        --      data_read_s       <= (others => 'X');
+                               next_data_read_s  <= data_read_s;
                        end if;
 
                        next_last_rd_s            <= rd_f_s;
@@ -356,17 +357,24 @@ memory_bus_logic:
                        -- Data for write are captured only when BLS signals are stable
                        if bls_f_s /= "0000" then
                                next_data_write_s <= data_f_s;
-                               next_last_address_s <= address_f_s;
                                next_address_hold_s <= '1';
                        else
                                next_data_write_s <= data_write_s;
                        end if;
+
+                       if (bls_f_s /= "0000") or (rd_f_s = '1') then
+                               next_last_address_s <= address_f_s;
+                       else
+                               next_last_address_s <= last_address_s;
+                       end if;
                else
                        next_last_rd_s <= '0';
                        next_last_i_rd_s <= '0';
 
                        next_i_bls_s <= "0000";
                        next_data_write_s <= data_write_s;
+                       next_data_read_s  <= data_read_s;
+                       next_last_address_s <= last_address_s;
                end if;
 
                -- Data for write are captured at/before BLS signals are negated