#include <string.h>
#include <ctype.h>
#include <stddef.h>
+#include <malloc.h>
#include <utils.h>
#include <cmd_proc.h>
#include <hal_gpio.h>
#include <hal_machperiph.h>
#include <LPC17xx.h>
+#include <lpcTIM.h>
#include <spi_drv.h>
+#include <pxmc.h>
+#include <inttypes.h>
#include <ul_log.h>
#include <ul_logreg.h>
#include "appl_defs.h"
+#include "appl_fpga.h"
+#include "pxmcc_types.h"
int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
maxaddr = sbrk(0);
- snprintf(str,sizeof(str),"memusage maxaddr 0x%08lx\n",(unsigned long)maxaddr);
- cmd_io_write(cmd_io,str,strlen(str));
+ snprintf(str, sizeof(str), "memusage maxaddr 0x%08lx\n", (unsigned long)maxaddr);
+ cmd_io_write(cmd_io, str, strlen(str));
return 0;
}
int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
- printf("ADC: %ld %ld %ld %ld %ld\n",(LPC_ADC->DR[0] & 0xFFF0)>>4,
- (LPC_ADC->DR[1] & 0xFFF0)>>4,
- (LPC_ADC->DR[2] & 0xFFF0)>>4,
- (LPC_ADC->DR[3] & 0xFFF0)>>4,
- (LPC_ADC->DR[7] & 0xFFF0)>>4);
+ printf("ADC: %ld %ld %ld %ld %ld\n", (LPC_ADC->DR[0] & 0xFFF0) >> 4,
+ (LPC_ADC->DR[1] & 0xFFF0) >> 4,
+ (LPC_ADC->DR[2] & 0xFFF0) >> 4,
+ (LPC_ADC->DR[3] & 0xFFF0) >> 4,
+ (LPC_ADC->DR[7] & 0xFFF0) >> 4);
return 0;
}
char s[30];
cmd_io_t *cmd_io = (cmd_io_t *)context;
- s[sizeof(s)-1]=0;
- snprintf(s,sizeof(s)-1,"%s (%d)\n\r",domain->name, domain->level);
+ s[sizeof(s) - 1] = 0;
+ snprintf(s, sizeof(s) - 1, "%s (%d)\n\r", domain->name, domain->level);
cmd_io_puts(cmd_io, s);
return 0;
}
int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
- int res=0;
+ int res = 0;
char *line;
line = param[1];
- if(!line||(si_skspace(&line),!*line)) {
+ if (!line || (si_skspace(&line), !*line))
+ {
ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
- } else {
- res=ul_log_domain_arg2levels(line);
+ }
+ else
+ {
+ res = ul_log_domain_arg2levels(line);
}
- return res>=0?0:CMDERR_BADPAR;
+ return res >= 0 ? 0 : CMDERR_BADPAR;
}
int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
int res;
int opchar;
- char *p=param[3];
+ char *p = param[3];
int spi_chan = (int)(intptr_t)des->info[0];
uint8_t *tx_buff = NULL;
uint8_t *rx_buff = NULL;
int len = 0;
spi_drv_t *spi_drv;
- if((opchar=cmd_opchar_check(cmd_io,des,param))<0) return opchar;
- if(opchar!=':')
+ if ((opchar = cmd_opchar_check(cmd_io, des, param)) < 0)
+ return opchar;
+
+ if (opchar != ':')
return -CMDERR_OPCHAR;
- if(spi_chan==-1)
- spi_chan=*param[1]-'0';
+ if (spi_chan == -1)
+ spi_chan = *param[1] - '0';
spi_drv = spi_find_drv(NULL, spi_chan);
- if(spi_drv==NULL)
+
+ if (spi_drv == NULL)
return -CMDERR_BADSUF;
- p=param[3];
+ p = param[3];
si_skspace(&p);
- if(isdigit((int)*p)){
- if(si_long(&p,&addr,16)<0) return -CMDERR_BADPAR;
+
+ if (isdigit((int)*p))
+ {
+ if (si_long(&p, &addr, 16) < 0)
+ return -CMDERR_BADPAR;
}
- if(si_fndsep(&p,"({")<0) return -CMDERR_BADSEP;
- if((res=si_add_to_arr(&p, (void**)&tx_buff, &len, 16, 1, "})"))<0)
+ if (si_fndsep(&p, "({") < 0)
+ return -CMDERR_BADSEP;
+
+ if ((res = si_add_to_arr(&p, (void **)&tx_buff, &len, 16, 1, "})")) < 0)
return -CMDERR_BADPAR;
- rx_buff=malloc(len);
+ rx_buff = malloc(len);
+
+ res = -1;
- res=-1;
- if(rx_buff!=NULL)
+ if (rx_buff != NULL)
res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
- if(res < 0) {
- printf("SPI! %02lX ERROR\n",addr);
- } else {
+ if (res < 0)
+ {
+ printf("SPI! %02lX ERROR\n", addr);
+ }
+ else
+ {
int i;
- printf("SPI! %02lX ",addr);
+ printf("SPI! %02lX ", addr);
printf("TX(");
- for(i=0;i<len;i++) printf("%s%02X",i?",":"",tx_buff[i]);
+
+ for (i = 0; i < len; i++)
+ printf("%s%02X", i ? "," : "", tx_buff[i]);
+
printf(") RX(");
- for(i=0;i<len;i++) printf("%s%02X",i?",":"",rx_buff[i]);
+
+ for (i = 0; i < len; i++)
+ printf("%s%02X", i ? "," : "", rx_buff[i]);
+
printf(")");
printf("\n");
return 0;
}
- if(rx_buff)
+ if (rx_buff)
free(rx_buff);
- if(tx_buff)
+
+ if (tx_buff)
free(tx_buff);
return 0;
}
-cmd_des_t const cmd_des_test_memusage={0, 0,
- "memusage","report memory usage",cmd_do_test_memusage,
- {0,
- 0}};
+#ifdef SDRAM_BASE
+int sdram_access_test(void)
+{
+ unsigned int *ptr;
+ unsigned int pattern;
+ size_t ramsz = SDRAM_SIZE;
+ size_t cnt;
+ lt_mstime_t tic;
+ size_t blksz, i;
+
+ lt_mstime_update();
+ tic = actual_msec;
+
+ pattern = 0x12abcdef;
+
+ for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
+ {
+ *(ptr++) = pattern;
+ pattern = pattern + 0x87654321;
+ }
+
+ lt_mstime_update();
+ printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
+
+ lt_mstime_update();
+ tic = actual_msec;
+
+ pattern = 0x12abcdef;
+
+ for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
+ {
+ if (*ptr != pattern)
+ {
+ printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
+ return -1;
+ }
+
+ *(ptr++) = ~pattern;
+ pattern = pattern + 0x87654321;
+ }
+
+ lt_mstime_update();
+ printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
+
+ lt_mstime_update();
+ tic = actual_msec;
+
+ pattern = 0x12abcdef;
+
+ for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
+ {
+ if (*(ptr++) != ~pattern)
+ {
+ printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
+ return -1;
+ }
+
+ pattern = pattern + 0x87654321;
+ }
+
+ lt_mstime_update();
+ printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
+
+ lt_mstime_update();
+ tic = actual_msec;
+
+ pattern = 0;
+
+ for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
+ {
+ pattern += *(ptr++);
+ }
+
+ lt_mstime_update();
+ printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
+
+ for (blksz = 1; blksz < 256 ; blksz *= 2)
+ {
+ lt_mstime_update();
+ tic = actual_msec;
+
+ pattern = 0;
+
+ for (cnt = ramsz / sizeof(*ptr); cnt; cnt -= blksz)
+ {
+ ptr = (typeof(ptr))SDRAM_BASE;
+
+ //ptr = (typeof(ptr))cmd_do_test_memusage;
+ //ptr = (typeof(ptr))&ptr;
+ for (i = blksz; i--;)
+ pattern += *(ptr++);
+ }
+
+ lt_mstime_update();
+ printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
+ }
+
+ return 0;
+}
+
+int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ sdram_access_test();
+ return 0;
+}
+#endif /*SDRAM_BASE*/
+
+int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ char *ps = param[1];
+ long mode = 0;
+ uint32_t *ptr;
+
+ if (ps != NULL) {
+ si_skspace(&ps);
+ if (*ps) {
+ if (si_ulong(&ps, &mode, 0) < 0)
+ return -CMDERR_BADPAR;
+ }
+ }
+ pxmc_rocon_rx_data_hist_buff = NULL;
+ pxmc_rocon_rx_data_hist_mode = mode;
+
+ #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
+ pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
+ #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
+ pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
+ 0x80000);
+ ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
+ if (mode != 0) {
+ *(ptr++) = '10XL';
+ *(ptr++) = mode;
+ }
+ pxmc_rocon_rx_data_hist_buff = (void *)ptr;
+ return 0;
+}
+
+int cmd_do_testlxpwrstat(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ printf("lxpwrrx period %ld latency %ld max %ld\n",
+ (long)pxmc_rocon_rx_cycle_time, (long)pxmc_rocon_rx_irq_latency,
+ (long)pxmc_rocon_rx_irq_latency_max);
+ return 0;
+}
+
+#include <math.h>
+
+int cmd_do_testfncapprox(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ char *ps = param[1];
+ unsigned long fnc;
+ unsigned long val;
+ unsigned long res;
+ long diff;
+ long diff_max = 0;
+ unsigned int xb;
+ uint32_t x;
+ uint32_t xl;
+ double xf;
+ int64_t yl;
+ long count = 1;
+ long step = 1 << (30-7-18+1 +4);
+
+ si_skspace(&ps);
+ if (si_ulong(&ps, &fnc, 0) < 0)
+ return -CMDERR_BADPAR;
+
+ si_skspace(&ps);
+ if (!strcmp(ps, "all")) {
+ val = 0;
+ count = 0x80000000UL / step;
+ if (fnc == 1) {
+ val = 1;
+ }
+ } else {
+ if (si_ulong(&ps, &val, 0) < 0)
+ return -CMDERR_BADPAR;
+ }
+
+ for (; count--; val += step) {
+
+ if (fnc == 1) {
+ x = val;
+ xb = __builtin_clz(x);
+ xl = x << xb;
+ } else {
+ xl = val;
+ }
+
+ fpga_fncapprox_base[fnc] = xl;
+
+ /* dummy read to provide time to function aproximator to proceed computation */
+ res = fpga_fncapprox_base[fnc];
+ res = fpga_fncapprox_base[fnc];
+
+ switch (fnc) {
+ case 0:
+ yl = xl;
+ case 1:
+ yl = (1LL << 62) / xl;
+ break;
+ case 2:
+ xf = (double)xl * M_PI / 2.0 / (1UL << 30);
+ yl = round(sin(xf) * (1UL << 16));
+ break;
+ case 3:
+ xf = (double)xl * M_PI / 2.0 / (1UL << 30);
+ yl = round(cos(xf) * (1UL << 16));
+ break;
+ default:
+ yl = 0;
+ }
+
+ diff = yl - res;
+
+ if ((diff > 0) && (diff > diff_max))
+ diff_max = diff;
+ else if ((diff < 0) && (-diff > diff_max))
+ diff_max = -diff;
+
+ }
+
+ val -= step;
+
+ printf("fnc=%ld val=0x%08lx res=0x%08lx ref=0x%08lx diff=%ld max %ld\n",
+ fnc, val, res, (unsigned long)yl, diff, diff_max);
+
+ return 0;
+}
+
+int cmd_do_testtumblefw(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ char *ps = param[1];
+ long pwm_d;
+ long pwm_q;
+ uint32_t ptofs;
+ uint32_t irc;
+ uint32_t ptirc;
+ uint32_t ptreci;
+ uint32_t pwmtx_info;
+ uint64_t ull;
+ pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
+ volatile pxmcc_data_t *mcc_data = (pxmcc_data_t *)fpga_tumbl_dmem;
+ volatile pxmcc_axis_data_t *mcc_axis = mcc_data->axis + 0;
+
+ mcc_axis->ccflg = 0;
+
+ si_skspace(&ps);
+ if (si_long(&ps, &pwm_d, 0) < 0)
+ return -CMDERR_BADPAR;
+
+ si_skspace(&ps);
+ if (si_ulong(&ps, &pwm_q, 0) < 0)
+ return -CMDERR_BADPAR;
+
+ irc = fpga_irc[0]->count;
+ ptofs = (int16_t)(mcs->pxms_ptofs - irc) + irc;
+
+ ptirc = mcs->pxms_ptirc;
+ ull = (1ULL << 32) * mcs->pxms_ptper;
+ ptreci = (ull + ptirc / 2) / ptirc;
+
+ pwmtx_info = (9 << 0) | (10 << 8) | (11 << 16);
+
+ mcc_axis->inp_info = mcs->pxms_inp_info;
+ mcc_axis->out_info = mcs->pxms_out_info;
+ mcc_axis->pwmtx_info = pwmtx_info;
+
+ mcc_axis->ptirc = ptirc;
+ mcc_axis->ptreci = ptreci;
+ mcc_axis->ptofs = ptofs;
+
+ mcc_axis->ccflg = 0;
+ mcc_axis->pwm_dq = (pwm_d << 16) | (pwm_q & 0xffff);
+
+ pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
+
+ mcc_axis->ccflg = 1;
+
+ if (0) {
+ mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[1].ccflg = 1;
+ mcc_data->axis[2].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[2].ccflg = 1;
+ mcc_data->axis[3].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
+ mcc_data->axis[3].ccflg = 1;
+ }
+
+ printf("spd %ld act_idle %"PRIu32" min_idle %"PRIu32" avail %lu pwm_cycle %"PRIu32"\n",
+ mcs->pxms_as, mcc_data->common.act_idle, mcc_data->common.min_idle,
+ (mcc_data->common.pwm_cycle + 6) / 6, mcc_data->common.pwm_cycle);
+ mcc_data->common.min_idle = 0x7fff;
+
+ return 0;
+}
+
+#define CK_IRC_WORDS 16
+#define CK_TX_WORDS 16
+#define CK_RX_WORDS 16
+
+#define CK_IRC_START ((uint32_t*)fpga_irc[0])
+#define CK_TX_START (fpga_lx_master_transmitter_base+9)
+#define CK_RX_START (fpga_lx_master_receiver_base+44)
+
+typedef struct ck_state_t {
+ uint32_t ck_irc_base[CK_IRC_WORDS];
+ uint32_t ck_irc_read[CK_IRC_WORDS];
+ uint32_t ck_tx_base[CK_TX_WORDS];
+ uint32_t ck_tx_read[CK_TX_WORDS];
+ uint32_t ck_rx_base[CK_RX_WORDS];
+ uint32_t ck_rx_read[CK_RX_WORDS];
+
+ uint32_t ck_irc_err;
+ uint32_t ck_tx_err;
+ uint32_t ck_rx_err;
+} ck_state_t;
+
+int cmd_do_testtumblebus(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ int i;
+ int cycles = 10000;
+ static ck_state_t *ckst = NULL;
+ if (ckst == NULL)
+ ckst = malloc(sizeof(*ckst));
+ if (ckst == NULL)
+ return 1;
+
+ ckst->ck_irc_err = 0;
+ ckst->ck_tx_err = 0;
+ ckst->ck_rx_err = 0;
+
+ for (i = 0; i < CK_IRC_WORDS; i++)
+ ckst->ck_irc_base[i] = CK_IRC_START[i];
+
+ for (i = 0; i < CK_TX_WORDS; i++)
+ ckst->ck_tx_base[i] = CK_TX_START[i];
+
+ for (i = 0; i < CK_RX_WORDS; i++)
+ ckst->ck_rx_base[i] = CK_RX_START[i];
+
+ while (cycles--) {
+ if (!ckst->ck_irc_err) {
+ for (i = 0; i < CK_IRC_WORDS; i++)
+ ckst->ck_irc_read[i] = CK_IRC_START[i];
+ for (i = 0; i < CK_IRC_WORDS; i++)
+ if (ckst->ck_irc_read[i] != ckst->ck_irc_base[i]) {
+ ckst->ck_irc_err++;
+ printf("irc+%x %08"PRIx32" != %08"PRIx32"\n",
+ i, ckst->ck_irc_read[i], ckst->ck_irc_base[i]);
+ }
+ }
+
+ if (!ckst->ck_tx_err) {
+ for (i = 0; i < CK_TX_WORDS; i++)
+ ckst->ck_tx_read[i] = CK_TX_START[i];
+ for (i = 0; i < CK_TX_WORDS; i++)
+ if (ckst->ck_tx_read[i] != ckst->ck_tx_base[i]) {
+ ckst->ck_tx_err++;
+ printf("tx+%x %08"PRIx32" != %08"PRIx32"\n",
+ i, ckst->ck_tx_read[i], ckst->ck_tx_base[i]);
+ }
+ }
+
+ if (!ckst->ck_rx_err) {
+ for (i = 0; i < CK_RX_WORDS; i++)
+ ckst->ck_rx_read[i] = CK_RX_START[i];
+ for (i = 0; i < CK_RX_WORDS; i++)
+ if (ckst->ck_rx_read[i] != ckst->ck_rx_base[i]) {
+ ckst->ck_rx_err++;
+ printf("rx+%x %08"PRIx32" != %08"PRIx32"\n",
+ i, ckst->ck_rx_read[i], ckst->ck_rx_base[i]);
+ }
+ }
+ }
+
+ return 0;
+}
+
+cmd_des_t const cmd_des_test_memusage = {0, 0,
+ "memusage", "report memory usage", cmd_do_test_memusage,
+{
+ 0,
+ 0
+}
+ };
-cmd_des_t const cmd_des_test_adc={0, 0,
- "testadc","adc test",cmd_do_test_adc,
- {0,
- 0}};
+cmd_des_t const cmd_des_test_adc = {0, 0,
+ "testadc", "adc test", cmd_do_test_adc,
+{
+ 0,
+ 0
+}
+ };
#ifdef APPL_WITH_DISTORE_EEPROM_USER
-cmd_des_t const cmd_des_test_distore={0, 0,
- "testdistore","test DINFO store",cmd_do_test_distore,
- {0,
- 0}};
-
-cmd_des_t const cmd_des_test_diload={0, 0,
- "testdiload","test DINFO load",cmd_do_test_diload,
- {0,
- 0}};
+cmd_des_t const cmd_des_test_distore = {0, 0,
+ "testdistore", "test DINFO store", cmd_do_test_distore,
+{
+ 0,
+ 0
+}
+ };
+
+cmd_des_t const cmd_des_test_diload = {0, 0,
+ "testdiload", "test DINFO load", cmd_do_test_diload,
+{
+ 0,
+ 0
+}
+ };
#endif /*APPL_WITH_DISTORE_EEPROM_USER*/
-cmd_des_t const cmd_des_test_loglevel={0, 0,
- "loglevel","select logging level",
- cmd_do_test_loglevel,{}};
+cmd_des_t const cmd_des_test_loglevel = {0, 0,
+ "loglevel", "select logging level",
+ cmd_do_test_loglevel, {}
+ };
+
+cmd_des_t const cmd_des_spimst = {0, CDESM_OPCHR | CDESM_WR,
+ "SPIMST", "SPI master communication request",
+ cmd_do_spimst_blocking, {(void *)0}
+ };
+
+cmd_des_t const cmd_des_spimstx = {0, CDESM_OPCHR | CDESM_WR,
+ "SPIMST#", "SPI# master communication request",
+ cmd_do_spimst_blocking, {(void *) - 1}
+ };
+
+#ifdef SDRAM_BASE
+cmd_des_t const cmd_des_testsdram = {0, 0,
+ "testsdram", "test SDRAM",
+ cmd_do_testsdram, {(void *)0}
+ };
+#endif /*SDRAM_BASE*/
+
+
+cmd_des_t const cmd_des_testlxpwrrx = {0, 0,
+ "testlxpwrrx", "capture data stream from lxpwr",
+ cmd_do_testlxpwrrx, {(void *)0}
+ };
-cmd_des_t const cmd_des_spimst={0, CDESM_OPCHR|CDESM_WR,
- "SPIMST","SPI master communication request",
- cmd_do_spimst_blocking,{(void*)0}};
+cmd_des_t const cmd_des_testlxpwrstat = {0, 0,
+ "testlxpwrstat", "lxpwr interrupt statistic",
+ cmd_do_testlxpwrstat, {(void *)0}
+ };
-cmd_des_t const cmd_des_spimstx={0, CDESM_OPCHR|CDESM_WR,
- "SPIMST#","SPI# master communication request",
- cmd_do_spimst_blocking,{(void*)-1}};
+cmd_des_t const cmd_des_testfncapprox = {0, 0,
+ "testfncapprox", "test of function approximator",
+ cmd_do_testfncapprox, {(void *)0}
+ };
-cmd_des_t const *const cmd_appl_tests[]={
+cmd_des_t const cmd_des_testtumblefw = {0, 0,
+ "testtumblefw", "test Tumble coprocesor firmware",
+ cmd_do_testtumblefw, {(void *)0}
+ };
+
+cmd_des_t const cmd_des_testtumblebus = {0, 0,
+ "testtumblebus", "test Tumble coprocesor bus",
+ cmd_do_testtumblebus, {(void *)0}
+ };
+
+
+cmd_des_t const *const cmd_appl_tests[] =
+{
&cmd_des_test_memusage,
&cmd_des_test_adc,
- #ifdef APPL_WITH_DISTORE_EEPROM_USER
+#ifdef APPL_WITH_DISTORE_EEPROM_USER
&cmd_des_test_distore,
&cmd_des_test_diload,
- #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
+#endif /*APPL_WITH_DISTORE_EEPROM_USER*/
&cmd_des_test_loglevel,
&cmd_des_spimst,
&cmd_des_spimstx,
+#ifdef SDRAM_BASE
+ &cmd_des_testsdram,
+#endif /*SDRAM_BASE*/
+ &cmd_des_testlxpwrrx,
+ &cmd_des_testlxpwrstat,
+ &cmd_des_testfncapprox,
+ &cmd_des_testtumblefw,
+ &cmd_des_testtumblebus,
NULL
};
projects / fpga / lx-cpu1 / lx-rocon.git / blobdiff