]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/blobdiff - hw/lx-rocon_tumbl/lx_rocon_tumbl.vhd
Tumbl - disable GPRF forward if finish_wrb_mem_s is clock cycle cause.
[fpga/lx-cpu1/lx-rocon.git] / hw / lx-rocon_tumbl / lx_rocon_tumbl.vhd
index eafdf59cf66c7d38e1385e298e0d06dc9f3a5166..5b9008a398ebda69f2f55c3dfbec807aa4a7f44f 100644 (file)
@@ -63,6 +63,7 @@ architecture rtl of lx_rocon_tumbl is
        signal imem_addr_s   : std_logic_vector((IMEM_ABITS_g-1) downto 0);
        signal imem_data_s   : std_logic_vector(31 downto 0);
        signal gprf_clken_s  : std_logic;
+       signal gprf_finish_wrb_mem_s : std_logic;
        signal core_clken_s  : std_logic;
        signal pc_ctrl_s     : std_logic;
        signal c2dmemb_s     : CORE2DMEMB_Type;
@@ -176,6 +177,7 @@ I_GPRF: lx_rocon_gprf_abd
                clk_i        => clk_i,
                rst_i        => rst_i,
                clken_i      => gprf_really_clken_s,
+               gprf_finish_wrb_mem_i => gprf_finish_wrb_mem_s,
                --
                ID2GPRF_i    => ID2GPRF_s,
                MEM_WRB_i    => MEM_WRB_s,
@@ -257,6 +259,7 @@ I_CTRL: core_ctrl
                delay_bit_o     => delay_bit_r,
                -- GPRF control
                gprf_clken_o    => gprf_clken_s,
+               gprf_finish_wrb_mem_o => gprf_finish_wrb_mem_s,
                -- exeq to fetch feedback registers
                EX2IF_REG_i     => EX2IF_s,
                EX2IF_REG_o     => EX2IF_r,