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RoCoN: test of FPGA internal interference between TUMBL and LPC.
[fpga/lx-cpu1/lx-rocon.git] / hw / irc_reader.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
5 use ieee.numeric_std.all;
6 use work.lx_rocon_pkg.all;
7
8 -- IRC reader module
9
10 entity irc_reader is
11         port
12         (
13                 -- Inputs
14     clk_i                : in std_logic;
15     reset_i              : in std_logic;
16     irc_i                : in IRC_INPUT_Type;
17                 -- State
18                 reset_index_event_i  : in std_logic;
19                 reset_index_event2_i : in std_logic;
20                 reset_ab_error_i     : in std_logic;
21                 -- Outputs
22     irc_o                : out IRC_OUTPUT_Type
23   );
24 end irc_reader;
25
26 architecture rtl of irc_reader is
27         begin
28
29 dff_mark: dff3
30         port map
31         (
32                 clk_i   => clk_i,
33                 d_i     => irc_i.mark,
34                 q_o     => irc_o.state.mark
35         );
36
37 qctr: qcounter
38         port map
39         (
40                 clk_i                => clk_i,
41                 reset_i              => reset_i,
42                 a0_i                 => irc_i.a,
43                 b0_i                 => irc_i.b,
44                 index0_i             => irc_i.index,
45                 reset_index_event_i  => reset_index_event_i,
46                 reset_index_event2_i => reset_index_event2_i,
47                 reset_ab_error_i     => reset_ab_error_i,
48                 qcount_o             => irc_o.count.qcount,
49                 qcount_index_o       => irc_o.count.index,
50                 ab_error_o           => irc_o.state.ab_error,
51                 ab_event_o           => open,
52                 index_o              => irc_o.state.index,
53                 index_event_o        => irc_o.count.index_event,
54                 index_event2_o       => irc_o.state.index_event,
55                 a_rise_o             => open,
56                 a_fall_o             => open,
57                 b_rise_o             => open,
58                 b_fall_o             => open
59         );
60
61 end rtl;