10 #define FPGA_TUMBL_IMEM_BASE 0x80000000
11 #define FPGA_TUMBL_DMEM_BASE 0x80001000
12 #define FPGA_TUMBL_CONTROL_REG 0x80003000
13 #define FPGA_TUMBL_TRACE_KICK_REG 0x80003004
14 #define FPGA_TUMBL_PC 0x80003008
16 #define FPGA_TUMBL_CONTROL_REG_RESET_BIT 0x01
17 #define FPGA_TUMBL_CONTROL_REG_INT_BIT 0x02
18 #define FPGA_TUMBL_CONTROL_REG_HALT_BIT 0x04
19 #define FPGA_TUMBL_CONTROL_REG_TRACE_BIT 0x08
21 extern volatile uint32_t *tumbl_control;
22 extern volatile uint32_t *tumbl_trace_kick;
23 extern volatile uint32_t *tumbl_pc;
24 extern volatile uint32_t *tumbl_imem;
25 extern volatile uint32_t *tumbl_dmem;
29 #define FPGA_IRC1_BASE 0x80022000
30 #define FPGA_IRC2_BASE 0x80022008
31 #define FPGA_IRC3_BASE 0x80022010
32 #define FPGA_IRC4_BASE 0x80022018
40 extern volatile struct irc_register *irc1;
41 extern volatile struct irc_register *irc2;
42 extern volatile struct irc_register *irc3;
43 extern volatile struct irc_register *irc4;
45 extern volatile uint8_t *irc1_state;
46 extern volatile uint8_t *irc2_state;
47 extern volatile uint8_t *irc3_state;
48 extern volatile uint8_t *irc4_state;
51 /* Configuration defines */
53 #define FPGA_CONFIGURATION_FILE_ADDRESS 0xA1C00000
55 #define FPGA_CONF_SUCESS 0
56 #define FPGA_CONF_ERR_RECONF_LOCKED 1
57 #define FPGA_CONF_ERR_RESET_FAIL 2
58 #define FPGA_CONF_ERR_WRITE_ERR 3
59 #define FPGA_CONF_ERR_CRC_ERR 4
61 int appl_fpga_tumbl_set_reset(int reset);
62 int appl_fpga_tumbl_set_halt(int halt);
63 int appl_fpga_tumbl_set_trace(int trace);
64 int appl_fpga_tumbl_kick_trace();
66 void appl_fpga_tumbl_write(unsigned int offset, unsigned char *ptr, int len);
68 void appl_fpga_init();
69 int appl_fpga_configure();
70 int appl_fpga_measure_bus_read();
71 int appl_fpga_measure_bus_write();
72 void appl_fpga_set_reconfiguration_lock(int lock);
73 int appl_fpga_get_reconfiguration_lock();
75 #endif /*_APPL_FPGA_H*/