1 #include <system_def.h>
11 #include <hal_machperiph.h>
19 #include <ul_logreg.h>
21 #include "appl_defs.h"
22 #include "appl_fpga.h"
23 #include "appl_pxmc.h"
24 #include "pxmcc_types.h"
25 #include "pxmcc_interface.h"
27 int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
34 snprintf(str, sizeof(str), "memusage maxaddr 0x%08lx\n", (unsigned long)maxaddr);
35 cmd_io_write(cmd_io, str, strlen(str));
40 int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
42 printf("ADC: %ld %ld %ld %ld %ld\n", (LPC_ADC->DR[0] & 0xFFF0) >> 4,
43 (LPC_ADC->DR[1] & 0xFFF0) >> 4,
44 (LPC_ADC->DR[2] & 0xFFF0) >> 4,
45 (LPC_ADC->DR[3] & 0xFFF0) >> 4,
46 (LPC_ADC->DR[7] & 0xFFF0) >> 4);
50 #ifdef APPL_WITH_DISTORE_EEPROM_USER
51 int cmd_do_test_distore(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
53 appl_distore_user_set_check4change();
57 int cmd_do_test_diload(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
59 appl_distore_user_restore();
62 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
64 int cmd_do_test_loglevel_cb(ul_log_domain_t *domain, void *context)
67 cmd_io_t *cmd_io = (cmd_io_t *)context;
70 snprintf(s, sizeof(s) - 1, "%s (%d)\n\r", domain->name, domain->level);
71 cmd_io_puts(cmd_io, s);
75 int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
81 if (!line || (si_skspace(&line), !*line))
83 ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
87 res = ul_log_domain_arg2levels(line);
90 return res >= 0 ? 0 : CMDERR_BADPAR;
93 int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
98 int spi_chan = (int)(intptr_t)des->info[0];
99 uint8_t *tx_buff = NULL;
100 uint8_t *rx_buff = NULL;
105 if ((opchar = cmd_opchar_check(cmd_io, des, param)) < 0)
109 return -CMDERR_OPCHAR;
112 spi_chan = *param[1] - '0';
114 spi_drv = spi_find_drv(NULL, spi_chan);
117 return -CMDERR_BADSUF;
123 if (isdigit((int)*p))
125 if (si_long(&p, &addr, 16) < 0)
126 return -CMDERR_BADPAR;
129 if (si_fndsep(&p, "({") < 0)
130 return -CMDERR_BADSEP;
132 if ((res = si_add_to_arr(&p, (void **)&tx_buff, &len, 16, 1, "})")) < 0)
133 return -CMDERR_BADPAR;
135 rx_buff = malloc(len);
140 res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
144 printf("SPI! %02lX ERROR\n", addr);
149 printf("SPI! %02lX ", addr);
152 for (i = 0; i < len; i++)
153 printf("%s%02X", i ? "," : "", tx_buff[i]);
157 for (i = 0; i < len; i++)
158 printf("%s%02X", i ? "," : "", rx_buff[i]);
174 int cmd_do_mtdspitest(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
181 int sdram_access_test(void)
184 unsigned int pattern;
185 size_t ramsz = SDRAM_SIZE;
193 pattern = 0x12abcdef;
195 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
198 pattern = pattern + 0x87654321;
202 printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
207 pattern = 0x12abcdef;
209 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
213 printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
218 pattern = pattern + 0x87654321;
222 printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
227 pattern = 0x12abcdef;
229 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
231 if (*(ptr++) != ~pattern)
233 printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
237 pattern = pattern + 0x87654321;
241 printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
248 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
254 printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
256 for (blksz = 1; blksz < 256 ; blksz *= 2)
263 for (cnt = ramsz / sizeof(*ptr); cnt; cnt -= blksz)
265 ptr = (typeof(ptr))SDRAM_BASE;
267 //ptr = (typeof(ptr))cmd_do_test_memusage;
268 //ptr = (typeof(ptr))&ptr;
269 for (i = blksz; i--;)
274 printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
280 int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
285 #endif /*SDRAM_BASE*/
287 int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
296 if (si_ulong(&ps, &mode, 0) < 0)
297 return -CMDERR_BADPAR;
300 pxmc_rocon_rx_data_hist_buff = NULL;
301 pxmc_rocon_rx_data_hist_mode = mode;
303 #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
304 pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
305 #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
306 pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
308 ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
313 pxmc_rocon_rx_data_hist_buff = (void *)ptr;
317 int cmd_do_testlxpwrstat(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
319 printf("lxpwrrx period %ld latency %ld max %ld\n",
320 (long)pxmc_rocon_rx_cycle_time, (long)pxmc_rocon_rx_irq_latency,
321 (long)pxmc_rocon_rx_irq_latency_max);
327 int cmd_do_testfncapprox(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
341 long step = 1 << (30-7-18+1 +4);
344 if (si_ulong(&ps, &fnc, 0) < 0)
345 return -CMDERR_BADPAR;
348 if (!strcmp(ps, "all")) {
350 count = 0x80000000UL / step;
355 if (si_ulong(&ps, &val, 0) < 0)
356 return -CMDERR_BADPAR;
359 for (; count--; val += step) {
363 xb = __builtin_clz(x);
369 fpga_fncapprox_base[fnc] = xl;
371 /* dummy read to provide time to function aproximator to proceed computation */
372 res = fpga_fncapprox_base[fnc];
373 res = fpga_fncapprox_base[fnc];
379 yl = (1LL << 62) / xl;
382 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
383 yl = round(sin(xf) * (1UL << 16));
386 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
387 yl = round(cos(xf) * (1UL << 16));
395 if ((diff > 0) && (diff > diff_max))
397 else if ((diff < 0) && (-diff > diff_max))
404 printf("fnc=%ld val=0x%08lx res=0x%08lx ref=0x%08lx diff=%ld max %ld\n",
405 fnc, val, res, (unsigned long)yl, diff, diff_max);
410 int cmd_do_testtumblefw(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
415 pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
416 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
418 pxmcc_axis_enable(mcs, 0);
421 if (si_long(&ps, &pwm_d, 0) < 0)
422 return -CMDERR_BADPAR;
425 if (si_ulong(&ps, &pwm_q, 0) < 0)
426 return -CMDERR_BADPAR;
430 pxmcc_axis_setup(mcs, PXMCC_MODE_BLDC);
432 pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
433 pxmcc_axis_pwm_dq_out(mcs, pwm_d, pwm_q);
434 pxmcc_axis_enable(mcs, 1);
437 mcc_data->axis[1].inp_info = 0;
438 mcc_data->axis[1].out_info = 3;
439 mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
440 mcc_data->axis[1].mode = PXMCC_MODE_BLDC;
441 mcc_data->axis[1].ccflg = 1;
442 mcc_data->axis[2].inp_info = 0;
443 mcc_data->axis[2].out_info = 6;
444 mcc_data->axis[2].pwmtx_info = (15 << 0) | (16 << 8) | (18 << 16);
445 mcc_data->axis[2].mode = PXMCC_MODE_BLDC;
446 mcc_data->axis[2].ccflg = 1;
447 mcc_data->axis[3].inp_info = 0;
448 mcc_data->axis[3].out_info = 9;
449 mcc_data->axis[3].pwmtx_info = (19 << 0) | (20 << 8) | (21 << 16);
450 mcc_data->axis[3].mode = PXMCC_MODE_BLDC;
451 mcc_data->axis[3].ccflg = 1;
454 printf("spd %ld act_idle %"PRIu32" min_idle %"PRIu32" avail %lu pwm_cycle %"PRIu32"\n",
455 mcs->pxms_as, mcc_data->common.act_idle, mcc_data->common.min_idle,
456 (mcc_data->common.pwm_cycle + 6) / 6, mcc_data->common.pwm_cycle);
457 mcc_data->common.min_idle = 0x7fff;
462 #define CK_IRC_WORDS 16
463 #define CK_TX_WORDS 16
464 #define CK_RX_WORDS 16
466 #define CK_IRC_START ((uint32_t*)fpga_irc[0])
467 #define CK_TX_START (fpga_lx_master_transmitter_base+9)
468 #define CK_RX_START (fpga_lx_master_receiver_base+44)
470 typedef struct ck_state_t {
471 uint32_t ck_irc_base[CK_IRC_WORDS];
472 uint32_t ck_irc_read[CK_IRC_WORDS];
473 uint32_t ck_tx_base[CK_TX_WORDS];
474 uint32_t ck_tx_read[CK_TX_WORDS];
475 uint32_t ck_rx_base[CK_RX_WORDS];
476 uint32_t ck_rx_read[CK_RX_WORDS];
483 int cmd_do_testtumblebus(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
487 static ck_state_t *ckst = NULL;
489 ckst = malloc(sizeof(*ckst));
493 ckst->ck_irc_err = 0;
497 for (i = 0; i < CK_IRC_WORDS; i++)
498 ckst->ck_irc_base[i] = CK_IRC_START[i];
500 for (i = 0; i < CK_TX_WORDS; i++)
501 ckst->ck_tx_base[i] = CK_TX_START[i];
503 for (i = 0; i < CK_RX_WORDS; i++)
504 ckst->ck_rx_base[i] = CK_RX_START[i];
507 if (!ckst->ck_irc_err) {
508 for (i = 0; i < CK_IRC_WORDS; i++)
509 ckst->ck_irc_read[i] = CK_IRC_START[i];
510 for (i = 0; i < CK_IRC_WORDS; i++)
511 if (ckst->ck_irc_read[i] != ckst->ck_irc_base[i]) {
513 printf("irc+%x %08"PRIx32" != %08"PRIx32"\n",
514 i, ckst->ck_irc_read[i], ckst->ck_irc_base[i]);
518 if (!ckst->ck_tx_err) {
519 for (i = 0; i < CK_TX_WORDS; i++)
520 ckst->ck_tx_read[i] = CK_TX_START[i];
521 for (i = 0; i < CK_TX_WORDS; i++)
522 if (ckst->ck_tx_read[i] != ckst->ck_tx_base[i]) {
524 printf("tx+%x %08"PRIx32" != %08"PRIx32"\n",
525 i, ckst->ck_tx_read[i], ckst->ck_tx_base[i]);
529 if (!ckst->ck_rx_err) {
530 for (i = 0; i < CK_RX_WORDS; i++)
531 ckst->ck_rx_read[i] = CK_RX_START[i];
532 for (i = 0; i < CK_RX_WORDS; i++)
533 if (ckst->ck_rx_read[i] != ckst->ck_rx_base[i]) {
535 printf("rx+%x %08"PRIx32" != %08"PRIx32"\n",
536 i, ckst->ck_rx_read[i], ckst->ck_rx_base[i]);
544 int cmd_do_testcuradc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
551 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
555 long pwm_cycle = mcc_data->common.pwm_cycle;
558 if (si_long(&ps, &pwm_chan_a, 0) < 0)
559 return -CMDERR_BADPAR;
562 if (si_ulong(&ps, &pwm_chan_b, 0) < 0)
563 return -CMDERR_BADPAR;
565 if (pwm_chan_a >= PXMCC_CURADC_CHANNELS)
566 return -CMDERR_BADPAR;
568 if (pwm_chan_b >= PXMCC_CURADC_CHANNELS)
569 return -CMDERR_BADPAR;
573 if (si_ulong(&ps, &pwm_b, 0) < 0)
574 return -CMDERR_BADPAR;
575 pxmc_for_each_mcs(i, mcs) {
576 /* PXMS_ENI_m - check if input (IRC) update is enabled */
577 if (mcs->pxms_flg & (PXMS_ENR_m | PXMS_ENO_m)) {
578 pxmc_axis_release(mcs);
582 for (i = 0; i < 16; i++) {
583 if (i == pwm_chan_a) {
584 if (pxmc_rocon_pwm_direct_wr(i, 0, 1) < 0)
586 } else if (i == pwm_chan_b) {
587 if (pxmc_rocon_pwm_direct_wr(i, pwm_b, 1) < 0)
590 pxmc_rocon_pwm_direct_wr(i, 0, 0);
595 cur_a = mcc_data->curadc[pwm_chan_a].cur_val;
596 cur_b = mcc_data->curadc[pwm_chan_b].cur_val;
597 if (pwm_b < pwm_cycle)
598 cur_b = (pwm_cycle * cur_b + pwm_cycle / 2) / (pwm_cycle - pwm_b);
600 printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_a, 0l, cur_a);
601 printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_b, pwm_b, cur_b);
606 int cmd_do_curadc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
609 volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
610 volatile pxmcc_curadc_data_t *curadc;
611 int subcmd = (int)des->info[0];
613 for (chan = 0; chan < PXMCC_CURADC_CHANNELS; chan++) {
614 curadc = mcc_data->curadc + chan;
617 printf("%s%ld", chan?",":"", (long)curadc->cur_val);
620 printf("%s%ld", chan?",":"", (long)curadc->siroladc_offs);
623 curadc->siroladc_offs += curadc->cur_val;
634 cmd_des_t const cmd_des_test_memusage = {0, 0,
635 "memusage", "report memory usage", cmd_do_test_memusage,
642 cmd_des_t const cmd_des_test_adc = {0, 0,
643 "testadc", "adc test", cmd_do_test_adc,
650 #ifdef APPL_WITH_DISTORE_EEPROM_USER
651 cmd_des_t const cmd_des_test_distore = {0, 0,
652 "testdistore", "test DINFO store", cmd_do_test_distore,
659 cmd_des_t const cmd_des_test_diload = {0, 0,
660 "testdiload", "test DINFO load", cmd_do_test_diload,
666 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
668 cmd_des_t const cmd_des_test_loglevel = {0, 0,
669 "loglevel", "select logging level",
670 cmd_do_test_loglevel, {}
673 cmd_des_t const cmd_des_spimst = {0, CDESM_OPCHR | CDESM_WR,
674 "SPIMST", "SPI master communication request",
675 cmd_do_spimst_blocking, {(void *)0}
678 cmd_des_t const cmd_des_spimstx = {0, CDESM_OPCHR | CDESM_WR,
679 "SPIMST#", "SPI# master communication request",
680 cmd_do_spimst_blocking, {(void *) - 1}
683 cmd_des_t const cmd_des_mtdspitest = {0, 0,
684 "mtdspitest", "test SPI connected Flash",
685 cmd_do_mtdspitest, {(void *) - 1}
689 cmd_des_t const cmd_des_testsdram = {0, 0,
690 "testsdram", "test SDRAM",
691 cmd_do_testsdram, {(void *)0}
693 #endif /*SDRAM_BASE*/
696 cmd_des_t const cmd_des_testlxpwrrx = {0, 0,
697 "testlxpwrrx", "capture data stream from lxpwr",
698 cmd_do_testlxpwrrx, {(void *)0}
701 cmd_des_t const cmd_des_testlxpwrstat = {0, 0,
702 "testlxpwrstat", "lxpwr interrupt statistic",
703 cmd_do_testlxpwrstat, {(void *)0}
706 cmd_des_t const cmd_des_testfncapprox = {0, 0,
707 "testfncapprox", "test of function approximator",
708 cmd_do_testfncapprox, {(void *)0}
711 cmd_des_t const cmd_des_testtumblefw = {0, 0,
712 "testtumblefw", "test Tumble coprocesor firmware",
713 cmd_do_testtumblefw, {(void *)0}
716 cmd_des_t const cmd_des_testtumblebus = {0, 0,
717 "testtumblebus", "test Tumble coprocesor bus",
718 cmd_do_testtumblebus, {(void *)0}
721 cmd_des_t const cmd_des_testcuradc = {0, 0,
722 "testcuradc", "test current adc channel calibration",
723 cmd_do_testcuradc, {(void *)0}
726 cmd_des_t const cmd_des_showcuradc = {0, 0,
727 "showcuradc", "print current ADC offsets",
728 cmd_do_curadc, {(void *)0}
731 cmd_des_t const cmd_des_showcuradcoffs = {0, 0,
732 "showcuradcoffs", "print current ADC offsets",
733 cmd_do_curadc, {(void *)1}
736 cmd_des_t const cmd_des_calcuradcoffs = {0, 0,
737 "calcuradcoffs", "calibrate current ADC offsets",
738 cmd_do_curadc, {(void *)2}
741 cmd_des_t const *const cmd_appl_tests[] =
743 &cmd_des_test_memusage,
745 #ifdef APPL_WITH_DISTORE_EEPROM_USER
746 &cmd_des_test_distore,
747 &cmd_des_test_diload,
748 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
749 &cmd_des_test_loglevel,
755 #endif /*SDRAM_BASE*/
756 &cmd_des_testlxpwrrx,
757 &cmd_des_testlxpwrstat,
758 &cmd_des_testfncapprox,
759 &cmd_des_testtumblefw,
760 &cmd_des_testtumblebus,
763 &cmd_des_showcuradcoffs,
764 &cmd_des_calcuradcoffs,