]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/blob - hw/lx-fncapprox/lx_fncapprox_pkg.vhd
Approximated function block changed to used signed 18x18 multiply of DSP48A1.
[fpga/lx-cpu1/lx-rocon.git] / hw / lx-fncapprox / lx_fncapprox_pkg.vhd
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
5 use ieee.numeric_std.all;
6
7 -- Entities within lx_fncapprox_pkg
8
9 package lx_fncapprox_pkg is
10
11         component rom_table
12         generic
13         (
14                 data_width : integer;
15                 addr_width : integer;
16                 init_file  : string
17         );
18         port
19         (
20                 ack_o  : out std_logic;
21                 addr_i : in  std_logic_vector (addr_width-1 downto 0);
22                 clk_i  : in  std_logic;
23                 data_o : out std_logic_vector (data_width-1 downto 0);
24                 stb_i  : in  std_logic
25         );
26         end component;
27
28         component lx_fncapprox_dsp48
29         port (
30                 P         : out std_logic_vector(47 downto 0);
31                 A         : in  std_logic_vector(17 downto 0) := (others => '0');
32                 B         : in  std_logic_vector(17 downto 0) := (others => '0');
33                 C         : in  std_logic_vector(47 downto 0) := (others => '0');
34                 CLK       : in  std_logic;
35                 CE        : in  std_logic
36         );
37         end component;
38
39 end lx_fncapprox_pkg;
40
41 package body lx_fncapprox_pkg is
42
43 end lx_fncapprox_pkg;